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04 Feb 2021 22:40:48 -0800 IronPort-SDR: CZ3zXB/kwdIQ+ZsKpZiCNeEOv7/KjRBRO0VtWZGllYILElv9jeTefuRnBlhzCUHf9W+KIa1scy yQ2O/larN2zHzSGvS61G+/WpiBU54Wvq4mnSVpsX9LUcD3KZ309iUt+Bqt+Vfko8q9pNeRtHSr f8PbCPCeu7Op9+AU+M7kAkQijZLgowyMfrzmcoYhcFTi5+u/Ir5LEbvQe/6tQPwKoJr+NDGcoY vZ7r4d62P/hhy0Ou6H6UVarcMWoqbqgQZgIH9NLpbAet6M7FiA59mlM9GLH2SIcamMT9dZp+Da T00= WDCIronportException: Internal Received: from wdapacbjl0003.my.asia.wdc.com (HELO twashi.fujisawa.hgst.com) ([10.84.71.58]) by uls-op-cesaip01.wdc.com with ESMTP; 04 Feb 2021 22:58:44 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org Subject: [PATCH v16 07/16] dt-bindings: fix sifive gpio properties Date: Fri, 5 Feb 2021 15:58:18 +0900 Message-Id: <20210205065827.577285-8-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210205065827.577285-1-damien.lemoal@wdc.com> References: <20210205065827.577285-1-damien.lemoal@wdc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210205_015847_115875_2F12A8B3 X-CRM114-Status: GOOD ( 11.08 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Rob Herring , Anup Patel , Sean Anderson , Atish Patra , Paul Walmsley Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The sifive gpio IP block supports up to 32 GPIOs. Reflect that in the interrupts property description and maxItems. Also add the standard ngpios property to describe the number of GPIOs available on the implementation. Also add the "canaan,k210-gpiohs" compatible string to indicate the use of this gpio controller in the Canaan Kendryte K210 SoC. If this compatible string is used, do not define the clocks property as required as the K210 SoC does not have a software controllable clock for the Sifive gpio IP block. Cc: Paul Walmsley Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Damien Le Moal --- .../devicetree/bindings/gpio/sifive,gpio.yaml | 22 ++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml index ab22056f8b44..211869d30212 100644 --- a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml @@ -16,6 +16,7 @@ properties: - enum: - sifive,fu540-c000-gpio - sifive,fu740-c000-gpio + - canaan,k210-gpiohs - const: sifive,gpio0 reg: @@ -23,9 +24,9 @@ properties: interrupts: description: - interrupt mapping one per GPIO. Maximum 16 GPIOs. + interrupt mapping one per GPIO. Maximum 32 GPIOs. minItems: 1 - maxItems: 16 + maxItems: 32 interrupt-controller: true @@ -38,6 +39,11 @@ properties: "#gpio-cells": const: 2 + ngpios: + description: + The number of GPIO pins available for the controller implementation. + It is 16 for the SiFive SoCs and 32 for the Canaan K210 SoC. + gpio-controller: true required: @@ -46,10 +52,20 @@ required: - interrupts - interrupt-controller - "#interrupt-cells" - - clocks - "#gpio-cells" - gpio-controller +if: + properties: + compatible: + contains: + enum: + - sifive,fu540-c000-gpio + - sifive,fu740-c000-gpio +then: + required: + - clocks + additionalProperties: false examples: