diff mbox series

[next] riscv: Add support for memtest

Message ID 20210225065417.76373-1-wangkefeng.wang@huawei.com (mailing list archive)
State New, archived
Headers show
Series [next] riscv: Add support for memtest | expand

Commit Message

Kefeng Wang Feb. 25, 2021, 6:54 a.m. UTC
The riscv [rv32_]defconfig enabled CONFIG_MEMTEST,
but memtest feature is not supported in RISCV.

Add early_memtest() to support for memtest.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
---
 Documentation/admin-guide/kernel-parameters.txt | 2 +-
 arch/riscv/mm/init.c                            | 6 ++++--
 2 files changed, 5 insertions(+), 3 deletions(-)

Comments

Palmer Dabbelt March 10, 2021, 2:19 a.m. UTC | #1
On Wed, 24 Feb 2021 22:54:17 PST (-0800), wangkefeng.wang@huawei.com wrote:
> The riscv [rv32_]defconfig enabled CONFIG_MEMTEST,
> but memtest feature is not supported in RISCV.
>
> Add early_memtest() to support for memtest.
>
> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
> ---
>  Documentation/admin-guide/kernel-parameters.txt | 2 +-
>  arch/riscv/mm/init.c                            | 6 ++++--
>  2 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
> index 04545725f187..20447b531630 100644
> --- a/Documentation/admin-guide/kernel-parameters.txt
> +++ b/Documentation/admin-guide/kernel-parameters.txt
> @@ -2794,7 +2794,7 @@
>  			seconds.  Use this parameter to check at some
>  			other rate.  0 disables periodic checking.
>
> -	memtest=	[KNL,X86,ARM,PPC] Enable memtest
> +	memtest=	[KNL,X86,ARM,PPC,RISCV] Enable memtest
>  			Format: <integer>
>  			default : 0 <disable>
>  			Specifies the number of memtest passes to be
> diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
> index 067583ab1bd7..7f5036fbee8c 100644
> --- a/arch/riscv/mm/init.c
> +++ b/arch/riscv/mm/init.c
> @@ -128,8 +128,9 @@ void __init setup_bootmem(void)
>  	if (max_mapped_addr == (dram_end - 1))
>  		memblock_set_current_limit(max_mapped_addr - 4096);
>
> -	max_pfn = PFN_DOWN(dram_end);
> -	max_low_pfn = max_pfn;
> +	min_low_pfn = PFN_UP(memblock_start_of_DRAM());
> +	max_low_pfn = max_pfn = PFN_DOWN(dram_end);
> +
>  	dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn));
>  	set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);
>
> @@ -593,6 +594,7 @@ void __init paging_init(void)
>
>  void __init misc_mem_init(void)
>  {
> +	early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
>  	arch_numa_init();
>  	sparse_init();
>  	zone_sizes_init();

Thanks, this is on for-next.
diff mbox series

Patch

diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 04545725f187..20447b531630 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -2794,7 +2794,7 @@ 
 			seconds.  Use this parameter to check at some
 			other rate.  0 disables periodic checking.
 
-	memtest=	[KNL,X86,ARM,PPC] Enable memtest
+	memtest=	[KNL,X86,ARM,PPC,RISCV] Enable memtest
 			Format: <integer>
 			default : 0 <disable>
 			Specifies the number of memtest passes to be
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 067583ab1bd7..7f5036fbee8c 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -128,8 +128,9 @@  void __init setup_bootmem(void)
 	if (max_mapped_addr == (dram_end - 1))
 		memblock_set_current_limit(max_mapped_addr - 4096);
 
-	max_pfn = PFN_DOWN(dram_end);
-	max_low_pfn = max_pfn;
+	min_low_pfn = PFN_UP(memblock_start_of_DRAM());
+	max_low_pfn = max_pfn = PFN_DOWN(dram_end);
+
 	dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn));
 	set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);
 
@@ -593,6 +594,7 @@  void __init paging_init(void)
 
 void __init misc_mem_init(void)
 {
+	early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
 	arch_numa_init();
 	sparse_init();
 	zone_sizes_init();