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([193.110.201.196]) by smtp.gmail.com with ESMTPSA id x11sm18202652pjh.0.2021.03.28.18.56.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 28 Mar 2021 18:56:23 -0700 (PDT) From: Jiuyang Liu To: Alex Ghiti Cc: Jiuyang Liu , Andrew Waterman , Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrew Morton , Geert Uytterhoeven , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] implement flush_cache_vmap and flush_cache_vunmap for RISC-V Date: Mon, 29 Mar 2021 01:55:09 +0000 Message-Id: <20210329015510.44110-1-liu@jiuyang.me> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210329_123039_161114_FCFC0624 X-CRM114-Status: UNSURE ( 9.81 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This patch implements flush_cache_vmap and flush_cache_vunmap for RISC-V, since these functions might modify PTE. Without this patch, SFENCE.VMA won't be added to related codes, which might introduce a bug in some out-of-order micro-architecture implementations. Signed-off-by: Jiuyang Liu Reviewed-by: Alexandre Ghiti --- arch/riscv/include/asm/cacheflush.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h index 23ff70350992..4adf25248c43 100644 --- a/arch/riscv/include/asm/cacheflush.h +++ b/arch/riscv/include/asm/cacheflush.h @@ -8,6 +8,14 @@ #include +/* + * flush_cache_vmap and flush_cache_vunmap might modify PTE, needs SFENCE.VMA. + * - flush_cache_vmap is invoked after map_kernel_range() has installed the page table entries. + * - flush_cache_vunmap is invoked before unmap_kernel_range() deletes the page table entries + */ +#define flush_cache_vmap(start, end) flush_tlb_all() +#define flush_cache_vunmap(start, end) flush_tlb_all() + static inline void local_flush_icache_all(void) { asm volatile ("fence.i" ::: "memory");