| Message ID | 20210819154436.117798-5-krzysztof.kozlowski@canonical.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/6] dt-bindings: riscv: correct e51 and u54-mc CPU bindings | expand |
Hi Krzysztof, On Thu, Aug 19, 2021 at 5:45 PM Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote: > Devicetree source is a description of hardware and hardware has only one > block @20008000 which can be configured either as eMMC or SDHC. Having > two node for different modes is an obscure, unusual and confusing way to > configure it. Instead the board file is supposed to customize the block > to its needs, e.g. to SDHC mode. > > This fixes dtbs_check warning: > arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: sdhc@20008000: $nodename:0: 'sdhc@20008000' does not match '^mmc(@.*)?$' > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Thanks for your patch! > --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > @@ -43,8 +43,16 @@ &serial3 { > status = "okay"; > }; > > -&sdcard { > +&mmc { > status = "okay"; > + > + disable-wp; > + cap-sd-highspeed; > + card-detect-delay = <200>; > + sd-uhs-sdr12; > + sd-uhs-sdr25; > + sd-uhs-sdr50; > + sd-uhs-sdr104; > }; > > &emac0 { > diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > index cb54da0cc3c4..c4ccd7e4d3eb 100644 > --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > @@ -262,25 +262,7 @@ serial3: serial@20104000 { > status = "disabled"; > }; > > - emmc: mmc@20008000 { > - compatible = "cdns,sd4hc"; > - reg = <0x0 0x20008000 0x0 0x1000>; > - interrupt-parent = <&plic>; > - interrupts = <88 89>; Note that the other node has only a single interrupt. Which one is correct? > - pinctrl-names = "default"; > - clocks = <&clkcfg 6>; > - bus-width = <4>; > - cap-mmc-highspeed; > - mmc-ddr-3_3v; > - max-frequency = <200000000>; > - non-removable; > - no-sd; > - no-sdio; > - voltage-ranges = <3300 3300>; > - status = "disabled"; > - }; > - > - sdcard: sdhc@20008000 { > + mmc: mmc@20008000 { > compatible = "cdns,sd4hc"; > reg = <0x0 0x20008000 0x0 0x1000>; > interrupt-parent = <&plic>; > @@ -288,13 +270,6 @@ sdcard: sdhc@20008000 { > pinctrl-names = "default"; > clocks = <&clkcfg 6>; > bus-width = <4>; I think bus-width should be moved to the board .dts, too. > - disable-wp; > - cap-sd-highspeed; > - card-detect-delay = <200>; > - sd-uhs-sdr12; > - sd-uhs-sdr25; > - sd-uhs-sdr50; > - sd-uhs-sdr104; > max-frequency = <200000000>; > status = "disabled"; > }; Gr{oetje,eeting}s, Geert
On 24/08/2021 17:37, Geert Uytterhoeven wrote: > Hi Krzysztof, > > On Thu, Aug 19, 2021 at 5:45 PM Krzysztof Kozlowski > <krzysztof.kozlowski@canonical.com> wrote: >> Devicetree source is a description of hardware and hardware has only one >> block @20008000 which can be configured either as eMMC or SDHC. Having >> two node for different modes is an obscure, unusual and confusing way to >> configure it. Instead the board file is supposed to customize the block >> to its needs, e.g. to SDHC mode. >> >> This fixes dtbs_check warning: >> arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: sdhc@20008000: $nodename:0: 'sdhc@20008000' does not match '^mmc(@.*)?$' >> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > > Thanks for your patch! > >> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts >> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts >> @@ -43,8 +43,16 @@ &serial3 { >> status = "okay"; >> }; >> >> -&sdcard { >> +&mmc { >> status = "okay"; >> + >> + disable-wp; >> + cap-sd-highspeed; >> + card-detect-delay = <200>; >> + sd-uhs-sdr12; >> + sd-uhs-sdr25; >> + sd-uhs-sdr50; >> + sd-uhs-sdr104; >> }; >> >> &emac0 { >> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi >> index cb54da0cc3c4..c4ccd7e4d3eb 100644 >> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi >> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi >> @@ -262,25 +262,7 @@ serial3: serial@20104000 { >> status = "disabled"; >> }; >> >> - emmc: mmc@20008000 { >> - compatible = "cdns,sd4hc"; >> - reg = <0x0 0x20008000 0x0 0x1000>; >> - interrupt-parent = <&plic>; >> - interrupts = <88 89>; > > Note that the other node has only a single interrupt. > Which one is correct? I assume the one put there initially, since it was tested (sdcard wsas enabled, emmc was disabled). > >> - pinctrl-names = "default"; >> - clocks = <&clkcfg 6>; >> - bus-width = <4>; >> - cap-mmc-highspeed; >> - mmc-ddr-3_3v; >> - max-frequency = <200000000>; >> - non-removable; >> - no-sd; >> - no-sdio; >> - voltage-ranges = <3300 3300>; >> - status = "disabled"; >> - }; >> - >> - sdcard: sdhc@20008000 { >> + mmc: mmc@20008000 { >> compatible = "cdns,sd4hc"; >> reg = <0x0 0x20008000 0x0 0x1000>; >> interrupt-parent = <&plic>; >> @@ -288,13 +270,6 @@ sdcard: sdhc@20008000 { >> pinctrl-names = "default"; >> clocks = <&clkcfg 6>; >> bus-width = <4>; > > I think bus-width should be moved to the board .dts, too. Makes sense. Thanks for review! Best regards, Krzysztof
diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts index 62f7651de538..ac6083c76083 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts @@ -43,8 +43,16 @@ &serial3 { status = "okay"; }; -&sdcard { +&mmc { status = "okay"; + + disable-wp; + cap-sd-highspeed; + card-detect-delay = <200>; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; }; &emac0 { diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi index cb54da0cc3c4..c4ccd7e4d3eb 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi @@ -262,25 +262,7 @@ serial3: serial@20104000 { status = "disabled"; }; - emmc: mmc@20008000 { - compatible = "cdns,sd4hc"; - reg = <0x0 0x20008000 0x0 0x1000>; - interrupt-parent = <&plic>; - interrupts = <88 89>; - pinctrl-names = "default"; - clocks = <&clkcfg 6>; - bus-width = <4>; - cap-mmc-highspeed; - mmc-ddr-3_3v; - max-frequency = <200000000>; - non-removable; - no-sd; - no-sdio; - voltage-ranges = <3300 3300>; - status = "disabled"; - }; - - sdcard: sdhc@20008000 { + mmc: mmc@20008000 { compatible = "cdns,sd4hc"; reg = <0x0 0x20008000 0x0 0x1000>; interrupt-parent = <&plic>; @@ -288,13 +270,6 @@ sdcard: sdhc@20008000 { pinctrl-names = "default"; clocks = <&clkcfg 6>; bus-width = <4>; - disable-wp; - cap-sd-highspeed; - card-detect-delay = <200>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; max-frequency = <200000000>; status = "disabled"; };
Devicetree source is a description of hardware and hardware has only one block @20008000 which can be configured either as eMMC or SDHC. Having two node for different modes is an obscure, unusual and confusing way to configure it. Instead the board file is supposed to customize the block to its needs, e.g. to SDHC mode. This fixes dtbs_check warning: arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: sdhc@20008000: $nodename:0: 'sdhc@20008000' does not match '^mmc(@.*)?$' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> --- .../microchip/microchip-mpfs-icicle-kit.dts | 10 ++++++- .../boot/dts/microchip/microchip-mpfs.dtsi | 27 +------------------ 2 files changed, 10 insertions(+), 27 deletions(-)