From patchwork Sat Oct 16 16:04:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 12563725 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 018EFC433EF for ; Sat, 16 Oct 2021 16:12:44 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6FC4460C4A for ; Sat, 16 Oct 2021 16:12:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 6FC4460C4A Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=mail.ustc.edu.cn Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=sCMvgX8Fq25c3UbI+MkrhoYjTzxlauNJvRXSWJPn4gU=; b=BF8P6p7c6vJ0pJ HpSTmsKvMlFySdCRBgkpCUfiEs7ekZK5IPH+odA95wnjlXbTR8ThMxcFkp2tSTdS4cJpNwIPZ6ifg Cxc/M29tE7c6Rl/cmagUtU/GIfWDeoJot4Gac+ZbsZVXIdqX1A41NQLLTSgJLvp/AklIZ0XwqlUU2 3G/nMXHG5k/eZ72+vCinjLHG4FKkjm0hPPjJhURA7X3PfycDqMPAubhW24kd6ysrw08SivHaK5l/d 6lghsdmnaOWAx4SxWUcPjmnJGDufL1bVYnlKI4MLqAorODblcSNiF32FO34OBvGNwY3bVQIik+WqR /NRxccNDPSc9JXyd87Vw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mbmIL-00Ax9s-23; Sat, 16 Oct 2021 16:12:25 +0000 Received: from email6.ustc.edu.cn ([2001:da8:d800::8] helo=ustc.edu.cn) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mbmIF-00Ax7v-Br for linux-riscv@lists.infradead.org; Sat, 16 Oct 2021 16:12:21 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mail.ustc.edu.cn; s=dkim; h=Received:Date:From:To:Cc:Subject: Message-ID:In-Reply-To:References:MIME-Version:Content-Type: Content-Transfer-Encoding; bh=NYfVsvsKjoAt436X+lbeN1yc0ODvfztizr YrE78fIZU=; b=ej26SoXuIp9bhImGOVgQvEKBBq0v//wYNobWfmrfiQJcfRIJaK UfvnkhmKFkRBxXMHZk64SXxBLI/P90O0S0ZtAXuwuCGtLcntIsefo5mMlKy+fk3w PwuRRxCnZjrF8+S9aSZFd0akG+UOR9e5sLH3lO0abMNIQ/kz8cVzDZCtY= Received: from xhacker (unknown [101.86.20.138]) by newmailweb.ustc.edu.cn (Coremail) with SMTP id LkAmygAXHwfT+WphY6c8AA--.23589S4; Sun, 17 Oct 2021 00:12:07 +0800 (CST) Date: Sun, 17 Oct 2021 00:04:43 +0800 From: Jisheng Zhang To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Masahiro Yamada , Michal Marek , Nick Desaulniers Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kbuild@vger.kernel.org Subject: [PATCH 1/2] riscv: consolidate __ex_table construction Message-ID: <20211017000443.4275747d@xhacker> In-Reply-To: <20211017000408.4ae9ecd6@xhacker> References: <20211017000408.4ae9ecd6@xhacker> MIME-Version: 1.0 X-CM-TRANSID: LkAmygAXHwfT+WphY6c8AA--.23589S4 X-Coremail-Antispam: 1UD129KBjvJXoWxury3tF4DZw4ktw15CFyUJrb_yoWrWF48pw srKrZ7KrW5KF18CFn7tF48uF4vg3WDGwnxK3sxWryv9r4DA3W0kFsYkF97W3ykJa15Z3Wx Cw18Krn3Jrs29rUanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUU9Yb7Iv0xC_KF4lb4IE77IF4wAFF20E14v26rWj6s0DM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28IrcIa0xkI8VA2jI 8067AKxVWUXwA2048vs2IY020Ec7CjxVAFwI0_Gr0_Xr1l8cAvFVAK0II2c7xJM28CjxkF 64kEwVA0rcxSw2x7M28EF7xvwVC0I7IYx2IY67AKxVW5JVW7JwA2z4x0Y4vE2Ix0cI8IcV CY1x0267AKxVWxJVW8Jr1l84ACjcxK6I8E87Iv67AKxVW8JVWxJwA2z4x0Y4vEx4A2jsIE c7CjxVAFwI0_Gr0_Gr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c 02F40Ex7xfMcIj6xIIjxv20xvE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8JwAm72CE 4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IY64vIr41l42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x 0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2 zVAF1VAY17CE14v26r1q6r43MIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Jr0_JF 4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK8VAvwI8IcIk0rVWUJVWU CwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I0E14v26r4j6r4UJbIYCT nIWIevJa73UjIFyTuYvjxUx9a9DUUUU X-CM-SenderInfo: xmv2xttqjtqzxdloh3xvwfhvlgxou0/ X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211016_091220_126190_B8CBA0E0 X-CRM114-Status: UNSURE ( 6.92 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Jisheng Zhang Consolidate all the __ex_table constuction code with a _ASM_EXTABLE helper. There should be no functional change as a result of this patch. Signed-off-by: Jisheng Zhang Reported-by: kernel test robot --- arch/riscv/include/asm/futex.h | 12 +++------- arch/riscv/include/asm/uaccess.h | 40 +++++++++++--------------------- 2 files changed, 17 insertions(+), 35 deletions(-) diff --git a/arch/riscv/include/asm/futex.h b/arch/riscv/include/asm/futex.h index 1b00badb9f87..3191574e135c 100644 --- a/arch/riscv/include/asm/futex.h +++ b/arch/riscv/include/asm/futex.h @@ -30,10 +30,7 @@ "3: li %[r],%[e] \n" \ " jump 2b,%[t] \n" \ " .previous \n" \ - " .section __ex_table,\"a\" \n" \ - " .balign " RISCV_SZPTR " \n" \ - " " RISCV_PTR " 1b, 3b \n" \ - " .previous \n" \ + _ASM_EXTABLE(1b, 3b) \ : [r] "+r" (ret), [ov] "=&r" (oldval), \ [u] "+m" (*uaddr), [t] "=&r" (tmp) \ : [op] "Jr" (oparg), [e] "i" (-EFAULT) \ @@ -103,11 +100,8 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, "4: li %[r],%[e] \n" " jump 3b,%[t] \n" " .previous \n" - " .section __ex_table,\"a\" \n" - " .balign " RISCV_SZPTR " \n" - " " RISCV_PTR " 1b, 4b \n" - " " RISCV_PTR " 2b, 4b \n" - " .previous \n" + _ASM_EXTABLE(1b, 4b) \ + _ASM_EXTABLE(2b, 4b) \ : [r] "+r" (ret), [v] "=&r" (val), [u] "+m" (*uaddr), [t] "=&r" (tmp) : [ov] "Jr" (oldval), [nv] "Jr" (newval), [e] "i" (-EFAULT) : "memory"); diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h index f314ff44c48d..5e4c9a5a17c5 100644 --- a/arch/riscv/include/asm/uaccess.h +++ b/arch/riscv/include/asm/uaccess.h @@ -47,6 +47,12 @@ likely(__access_ok((unsigned long __force)(addr), (size))); \ }) +#define _ASM_EXTABLE(from, to) \ + " .pushsection __ex_table, \"a\"\n" \ + " .balign " RISCV_SZPTR " \n" \ + " " RISCV_PTR "(" #from "), (" #to ")\n" \ + " .popsection\n" + /* * Ensure that the range [addr, addr+size) is within the process's * address space @@ -93,10 +99,7 @@ do { \ " li %1, 0\n" \ " jump 2b, %2\n" \ " .previous\n" \ - " .section __ex_table,\"a\"\n" \ - " .balign " RISCV_SZPTR "\n" \ - " " RISCV_PTR " 1b, 3b\n" \ - " .previous" \ + _ASM_EXTABLE(1b, 3b) \ : "+r" (err), "=&r" (__x), "=r" (__tmp) \ : "m" (*(ptr)), "i" (-EFAULT)); \ (x) = __x; \ @@ -125,11 +128,8 @@ do { \ " li %2, 0\n" \ " jump 3b, %3\n" \ " .previous\n" \ - " .section __ex_table,\"a\"\n" \ - " .balign " RISCV_SZPTR "\n" \ - " " RISCV_PTR " 1b, 4b\n" \ - " " RISCV_PTR " 2b, 4b\n" \ - " .previous" \ + _ASM_EXTABLE(1b, 4b) \ + _ASM_EXTABLE(2b, 4b) \ : "+r" (err), "=&r" (__lo), "=r" (__hi), \ "=r" (__tmp) \ : "m" (__ptr[__LSW]), "m" (__ptr[__MSW]), \ @@ -233,10 +233,7 @@ do { \ " li %0, %4\n" \ " jump 2b, %1\n" \ " .previous\n" \ - " .section __ex_table,\"a\"\n" \ - " .balign " RISCV_SZPTR "\n" \ - " " RISCV_PTR " 1b, 3b\n" \ - " .previous" \ + _ASM_EXTABLE(1b, 3b) \ : "+r" (err), "=r" (__tmp), "=m" (*(ptr)) \ : "rJ" (__x), "i" (-EFAULT)); \ } while (0) @@ -262,11 +259,8 @@ do { \ " li %0, %6\n" \ " jump 3b, %1\n" \ " .previous\n" \ - " .section __ex_table,\"a\"\n" \ - " .balign " RISCV_SZPTR "\n" \ - " " RISCV_PTR " 1b, 4b\n" \ - " " RISCV_PTR " 2b, 4b\n" \ - " .previous" \ + _ASM_EXTABLE(1b, 4b) \ + _ASM_EXTABLE(2b, 4b) \ : "+r" (err), "=r" (__tmp), \ "=m" (__ptr[__LSW]), \ "=m" (__ptr[__MSW]) \ @@ -417,10 +411,7 @@ unsigned long __must_check clear_user(void __user *to, unsigned long n) " li %[err], %[efault]\n" \ " jump 1b, %[rc]\n" \ ".previous\n" \ - ".section __ex_table,\"a\"\n" \ - ".balign " RISCV_SZPTR "\n" \ - " " RISCV_PTR " 1b, 2b\n" \ - ".previous\n" \ + _ASM_EXTABLE(1b, 2b) \ : [ret] "=&r" (__ret), \ [rc] "=&r" (__rc), \ [ptr] "+A" (*__ptr), \ @@ -443,10 +434,7 @@ unsigned long __must_check clear_user(void __user *to, unsigned long n) " li %[err], %[efault]\n" \ " jump 1b, %[rc]\n" \ ".previous\n" \ - ".section __ex_table,\"a\"\n" \ - ".balign " RISCV_SZPTR "\n" \ - " " RISCV_PTR " 1b, 2b\n" \ - ".previous\n" \ + _ASM_EXTABLE(1b, 2b) \ : [ret] "=&r" (__ret), \ [rc] "=&r" (__rc), \ [ptr] "+A" (*__ptr), \