| Message ID | 20220120090918.2646626-7-atishp@rivosinc.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Sparse HART id support | expand |
Hi Atish, On Thu, Jan 20, 2022 at 10:12 AM Atish Patra <atishp@rivosinc.com> wrote: > Currently, SBI APIs accept a hartmask that is generated from struct > cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it > is not the correct data structure for hartids as it can be higher > than NR_CPUs for platforms with sparse or discontguous hartids. > > Remove all association between hartid mask and struct cpumask. > > Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes) > Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes) > Signed-off-by: Atish Patra <atishp@rivosinc.com> Thanks for your patch, which is now commit 26fb751ca37846c9 ("RISC-V: Do not use cpumask data structure for hartid bitmap") in v5.17-rc1. I am having an issue with random userspace SEGVs on Starlight Beta (which needs out-of-tree patches). It doesn't always manifest itself immediately, so it took a while to bisect, but I suspect the above commit to be the culprit. So far the Icicle looks unaffected. Do you have a clue? Thanks! Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On Tue, Jan 25, 2022 at 12:12 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > Hi Atish, > > On Thu, Jan 20, 2022 at 10:12 AM Atish Patra <atishp@rivosinc.com> wrote: > > Currently, SBI APIs accept a hartmask that is generated from struct > > cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it > > is not the correct data structure for hartids as it can be higher > > than NR_CPUs for platforms with sparse or discontguous hartids. > > > > Remove all association between hartid mask and struct cpumask. > > > > Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes) > > Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes) > > Signed-off-by: Atish Patra <atishp@rivosinc.com> > > Thanks for your patch, which is now commit 26fb751ca37846c9 ("RISC-V: > Do not use cpumask data structure for hartid bitmap") in v5.17-rc1. > > I am having an issue with random userspace SEGVs on Starlight Beta > (which needs out-of-tree patches). It doesn't always manifest > itself immediately, so it took a while to bisect, but I suspect the > above commit to be the culprit. > I have never seen one before during my testing. How frequently do you see them? Does it happen while running anything or just idle user space results in SEGVs randomly. Do you have a trace that I can look into ? > So far the Icicle looks unaffected. > > Do you have a clue? > Thanks! > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
Hi Atish, On Tue, Jan 25, 2022 at 9:17 PM Atish Patra <atishp@atishpatra.org> wrote: > On Tue, Jan 25, 2022 at 12:12 PM Geert Uytterhoeven > <geert@linux-m68k.org> wrote: > > On Thu, Jan 20, 2022 at 10:12 AM Atish Patra <atishp@rivosinc.com> wrote: > > > Currently, SBI APIs accept a hartmask that is generated from struct > > > cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it > > > is not the correct data structure for hartids as it can be higher > > > than NR_CPUs for platforms with sparse or discontguous hartids. > > > > > > Remove all association between hartid mask and struct cpumask. > > > > > > Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes) > > > Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes) > > > Signed-off-by: Atish Patra <atishp@rivosinc.com> > > > > Thanks for your patch, which is now commit 26fb751ca37846c9 ("RISC-V: > > Do not use cpumask data structure for hartid bitmap") in v5.17-rc1. > > > > I am having an issue with random userspace SEGVs on Starlight Beta > > (which needs out-of-tree patches). It doesn't always manifest > > itself immediately, so it took a while to bisect, but I suspect the > > above commit to be the culprit. > > I have never seen one before during my testing. How frequently do you see them? > Does it happen while running anything or just idle user space results > in SEGVs randomly. Sometimes they happen during startup (lots of failures from systemd), sometimes they happen later, during interactive work. Sometimes while idle, and something runs in the background (e.g. mandb). > Do you have a trace that I can look into ? # apt update [ 807.499050] apt[258]: unhandled signal 11 code 0x1 at 0xffffff8300060020 in libapt-pkg.so.6.0.0[3fa49ac000+174000] [ 807.509548] CPU: 0 PID: 258 Comm: apt Not tainted 5.16.0-starlight-11192-g26fb751ca378-dirty #153 [ 807.518674] Hardware name: BeagleV Starlight Beta (DT) [ 807.524077] epc : 0000003fa4a47a0a ra : 0000003fa4a479fc sp : 0000003fcb4b39b0 [ 807.531383] gp : 0000002adcef4800 tp : 0000003fa43287b0 t0 : 0000000000000001 [ 807.538603] t1 : 0000000000000009 t2 : 00000000000003ff s0 : 0000000000000000 [ 807.545887] s1 : 0000002adcf3cb60 a0 : 0000000000000003 a1 : 0000000000000000 [ 807.553167] a2 : 0000003fcb4b3a30 a3 : 0000000000000000 a4 : 0000002adcf3cc1c [ 807.560390] a5 : 0007000300060000 a6 : 0000000000000003 a7 : 1999999999999999 [ 807.567654] s2 : 0000003fcb4b3a28 s3 : 0000000000000002 s4 : 0000003fcb4b3a30 [ 807.575039] s5 : 0000003fa4baa810 s6 : 0000000000000010 s7 : 0000002adcf19a40 [ 807.582363] s8 : 0000003fcb4b4010 s9 : 0000003fa4baa810 s10: 0000003fcb4b3e90 [ 807.589606] s11: 0000003fa4b2a528 t3 : 0000000000000000 t4 : 0000003fa47906a0 [ 807.596891] t5 : 0000000000000005 t6 : ffffffffffffffff [ 807.602302] status: 0000000200004020 badaddr: ffffff8300060020 cause: 000000000000000d (-dirty due to Starlight DTS and driver updates) Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On 1/25/22 12:52, Geert Uytterhoeven wrote: > Hi Atish, > > On Tue, Jan 25, 2022 at 9:17 PM Atish Patra <atishp@atishpatra.org> wrote: >> On Tue, Jan 25, 2022 at 12:12 PM Geert Uytterhoeven >> <geert@linux-m68k.org> wrote: >>> On Thu, Jan 20, 2022 at 10:12 AM Atish Patra <atishp@rivosinc.com> wrote: >>>> Currently, SBI APIs accept a hartmask that is generated from struct >>>> cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it >>>> is not the correct data structure for hartids as it can be higher >>>> than NR_CPUs for platforms with sparse or discontguous hartids. >>>> >>>> Remove all association between hartid mask and struct cpumask. >>>> >>>> Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes) >>>> Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes) >>>> Signed-off-by: Atish Patra <atishp@rivosinc.com> >>> Thanks for your patch, which is now commit 26fb751ca37846c9 ("RISC-V: >>> Do not use cpumask data structure for hartid bitmap") in v5.17-rc1. >>> >>> I am having an issue with random userspace SEGVs on Starlight Beta >>> (which needs out-of-tree patches). It doesn't always manifest >>> itself immediately, so it took a while to bisect, but I suspect the >>> above commit to be the culprit. >> I have never seen one before during my testing. How frequently do you see them? >> Does it happen while running anything or just idle user space results >> in SEGVs randomly. > Sometimes they happen during startup (lots of failures from systemd), > sometimes they happen later, during interactive work. > Sometimes while idle, and something runs in the background (e.g. mandb). > >> Do you have a trace that I can look into ? > # apt update > [ 807.499050] apt[258]: unhandled signal 11 code 0x1 at > 0xffffff8300060020 in libapt-pkg.so.6.0.0[3fa49ac000+174000] > [ 807.509548] CPU: 0 PID: 258 Comm: apt Not tainted > 5.16.0-starlight-11192-g26fb751ca378-dirty #153 > [ 807.518674] Hardware name: BeagleV Starlight Beta (DT) > [ 807.524077] epc : 0000003fa4a47a0a ra : 0000003fa4a479fc sp : > 0000003fcb4b39b0 > [ 807.531383] gp : 0000002adcef4800 tp : 0000003fa43287b0 t0 : > 0000000000000001 > [ 807.538603] t1 : 0000000000000009 t2 : 00000000000003ff s0 : > 0000000000000000 > [ 807.545887] s1 : 0000002adcf3cb60 a0 : 0000000000000003 a1 : > 0000000000000000 > [ 807.553167] a2 : 0000003fcb4b3a30 a3 : 0000000000000000 a4 : > 0000002adcf3cc1c > [ 807.560390] a5 : 0007000300060000 a6 : 0000000000000003 a7 : > 1999999999999999 > [ 807.567654] s2 : 0000003fcb4b3a28 s3 : 0000000000000002 s4 : > 0000003fcb4b3a30 > [ 807.575039] s5 : 0000003fa4baa810 s6 : 0000000000000010 s7 : > 0000002adcf19a40 > [ 807.582363] s8 : 0000003fcb4b4010 s9 : 0000003fa4baa810 s10: > 0000003fcb4b3e90 > [ 807.589606] s11: 0000003fa4b2a528 t3 : 0000000000000000 t4 : > 0000003fa47906a0 > [ 807.596891] t5 : 0000000000000005 t6 : ffffffffffffffff > [ 807.602302] status: 0000000200004020 badaddr: ffffff8300060020 > cause: 000000000000000d > > (-dirty due to Starlight DTS and driver updates) > > Gr{oetje,eeting}s, > > Geert > > -- I'm not sure if it's related, but I'm also seeing a systemd segfault on boot with the HiFive Unmatched and 5.17.0-rc1. I don't have the dmesg dump, but here's the journalctl dump. It was built before the tag, so it says 5.16.0. Jan 23 02:41:50 riscv64 systemd-udevd[551]: mmcblk0p12: Failed to wait for spawned command '/usr/bin/unshare -m /usr/bin/snap auto-import --mount=/dev/mmcblk0p12': Invalid argument Jan 23 02:41:50 riscv64 systemd-udevd[412]: mmcblk0p12: Process '/usr/bin/unshare -m /usr/bin/snap auto-import --mount=/dev/mmcblk0p12' terminated by signal SEGV. Jan 23 02:41:50 riscv64 kernel: systemd-udevd[551]: unhandled signal 11 code 0x1 at 0x0000000003938700 in udevadm[3fa7eee000+b1000] Jan 23 02:41:50 riscv64 kernel: CPU: 2 PID: 551 Comm: systemd-udevd Not tainted 5.16.0 #1 Jan 23 02:41:50 riscv64 kernel: Hardware name: SiFive HiFive Unmatched A00 (DT) Jan 23 02:41:50 riscv64 kernel: epc : 0000003fa7f14104 ra : 0000003fa7f14102 sp : 0000003fe3da5320 Jan 23 02:41:50 riscv64 kernel: gp : 0000003fa7fc3ef8 tp : 0000003fa79f8530 t0 : 0000003fe3da38f0 Jan 23 02:41:50 riscv64 kernel: t1 : 0000003fa7f0425c t2 : 0000000000000000 s0 : 0000003fcd046d88 Jan 23 02:41:50 riscv64 kernel: s1 : 0000003fcd046d60 a0 : ffffffffffffffff a1 : 0000003fcd0cb330 Jan 23 02:41:50 riscv64 kernel: a2 : 0000003fcd043028 a3 : 0000000000000007 a4 : c98b6a1813e46d00 Jan 23 02:41:50 riscv64 kernel: a5 : ffffffffffffffff a6 : fefefefefefefeff a7 : 0000000000000039 Jan 23 02:41:50 riscv64 kernel: s2 : 0000000000000000 s3 : ffffffffffffffea s4 : 0000000000000000 Jan 23 02:41:50 riscv64 kernel: s5 : 0000003fe3da5378 s6 : ffffffffffffffea s7 : 0000000003938700 Jan 23 02:41:50 riscv64 kernel: s8 : 0000003fe3da53e0 s9 : 0000003fe3da53d8 s10: 0000003fa7fc200c Jan 23 02:41:50 riscv64 kernel: s11: 0000000000081000 t3 : 0000003fa7db3822 t4 : 0000000000000000 Jan 23 02:41:50 riscv64 kernel: t5 : 0000003fe3da38c8 t6 : 000000000000002a Jan 23 02:41:50 riscv64 kernel: status: 0000000200004020 badaddr: 0000000003938700 cause: 000000000000000d Jan 23 02:41:50 riscv64 systemd-udevd[412]: mmcblk0p12: Failed to wait for spawned command '/usr/bin/unshare -m /usr/bin/snap auto-import --mount=/dev/mmcblk0p12': Input/output error Jan 23 02:41:50 riscv64 systemd-udevd[412]: mmcblk0p12: Failed to execute '/usr/bin/unshare -m /usr/bin/snap auto-import --mount=/dev/mmcblk0p12', ignoring: Input/output error I'll try removing this patch. Ron
On 20 Jan 2022, at 09:09, Atish Patra <atishp@rivosinc.com> wrote: > > Currently, SBI APIs accept a hartmask that is generated from struct > cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it > is not the correct data structure for hartids as it can be higher > than NR_CPUs for platforms with sparse or discontguous hartids. > > Remove all association between hartid mask and struct cpumask. > > Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes) > Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes) > Signed-off-by: Atish Patra <atishp@rivosinc.com> > --- > arch/riscv/include/asm/sbi.h | 19 +-- > arch/riscv/include/asm/smp.h | 2 - > arch/riscv/kernel/sbi.c | 189 +++++++++++++++++------------- > arch/riscv/kernel/setup.c | 10 -- > arch/riscv/kernel/smpboot.c | 2 +- > arch/riscv/kvm/mmu.c | 4 +- > arch/riscv/kvm/vcpu_sbi_replace.c | 11 +- > arch/riscv/kvm/vcpu_sbi_v01.c | 11 +- > arch/riscv/kvm/vmid.c | 4 +- > arch/riscv/mm/cacheflush.c | 5 +- > arch/riscv/mm/tlbflush.c | 9 +- > 11 files changed, 130 insertions(+), 136 deletions(-) > > diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h > index 26ba6f2d7a40..d1c37479d828 100644 > --- a/arch/riscv/include/asm/sbi.h > +++ b/arch/riscv/include/asm/sbi.h > @@ -8,6 +8,7 @@ > #define _ASM_RISCV_SBI_H > > #include <linux/types.h> > +#include <linux/cpumask.h> > > #ifdef CONFIG_RISCV_SBI > enum sbi_ext_id { > @@ -128,27 +129,27 @@ long sbi_get_mimpid(void); > void sbi_set_timer(uint64_t stime_value); > void sbi_shutdown(void); > void sbi_clear_ipi(void); > -int sbi_send_ipi(const unsigned long *hart_mask); > -int sbi_remote_fence_i(const unsigned long *hart_mask); > -int sbi_remote_sfence_vma(const unsigned long *hart_mask, > +int sbi_send_ipi(const struct cpumask *cpu_mask); > +int sbi_remote_fence_i(const struct cpumask *cpu_mask); > +int sbi_remote_sfence_vma(const struct cpumask *cpu_mask, > unsigned long start, > unsigned long size); > > -int sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, > +int sbi_remote_sfence_vma_asid(const struct cpumask *cpu_mask, > unsigned long start, > unsigned long size, > unsigned long asid); > -int sbi_remote_hfence_gvma(const unsigned long *hart_mask, > +int sbi_remote_hfence_gvma(const struct cpumask *cpu_mask, > unsigned long start, > unsigned long size); > -int sbi_remote_hfence_gvma_vmid(const unsigned long *hart_mask, > +int sbi_remote_hfence_gvma_vmid(const struct cpumask *cpu_mask, > unsigned long start, > unsigned long size, > unsigned long vmid); > -int sbi_remote_hfence_vvma(const unsigned long *hart_mask, > +int sbi_remote_hfence_vvma(const struct cpumask *cpu_mask, > unsigned long start, > unsigned long size); > -int sbi_remote_hfence_vvma_asid(const unsigned long *hart_mask, > +int sbi_remote_hfence_vvma_asid(const struct cpumask *cpu_mask, > unsigned long start, > unsigned long size, > unsigned long asid); > @@ -183,7 +184,7 @@ static inline unsigned long sbi_mk_version(unsigned long major, > > int sbi_err_map_linux_errno(int err); > #else /* CONFIG_RISCV_SBI */ > -static inline int sbi_remote_fence_i(const unsigned long *hart_mask) { return -1; } > +static inline int sbi_remote_fence_i(const struct cpumask *cpu_mask) { return -1; } > static inline void sbi_init(void) {} > #endif /* CONFIG_RISCV_SBI */ > #endif /* _ASM_RISCV_SBI_H */ > diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h > index 6ad749f42807..23170c933d73 100644 > --- a/arch/riscv/include/asm/smp.h > +++ b/arch/riscv/include/asm/smp.h > @@ -92,8 +92,6 @@ static inline void riscv_clear_ipi(void) > > #endif /* CONFIG_SMP */ > > -void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out); > - > #if defined(CONFIG_HOTPLUG_CPU) && (CONFIG_SMP) > bool cpu_has_hotplug(unsigned int cpu); > #else > diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c > index 9a84f0cb5175..f72527fcb347 100644 > --- a/arch/riscv/kernel/sbi.c > +++ b/arch/riscv/kernel/sbi.c > @@ -16,8 +16,8 @@ unsigned long sbi_spec_version __ro_after_init = SBI_SPEC_VERSION_DEFAULT; > EXPORT_SYMBOL(sbi_spec_version); > > static void (*__sbi_set_timer)(uint64_t stime) __ro_after_init; > -static int (*__sbi_send_ipi)(const unsigned long *hart_mask) __ro_after_init; > -static int (*__sbi_rfence)(int fid, const unsigned long *hart_mask, > +static int (*__sbi_send_ipi)(const struct cpumask *cpu_mask) __ro_after_init; > +static int (*__sbi_rfence)(int fid, const struct cpumask *cpu_mask, > unsigned long start, unsigned long size, > unsigned long arg4, unsigned long arg5) __ro_after_init; > > @@ -67,6 +67,30 @@ int sbi_err_map_linux_errno(int err) > EXPORT_SYMBOL(sbi_err_map_linux_errno); > > #ifdef CONFIG_RISCV_SBI_V01 > +static unsigned long __sbi_v01_cpumask_to_hartmask(const struct cpumask *cpu_mask) > +{ > + unsigned long cpuid, hartid; > + unsigned long hmask = 0; > + > + /* > + * There is no maximum hartid concept in RISC-V and NR_CPUS must not be > + * associated with hartid. As SBI v0.1 is only kept for backward compatibility > + * and will be removed in the future, there is no point in supporting hartid > + * greater than BITS_PER_LONG (32 for RV32 and 64 for RV64). Ideally, SBI v0.2 > + * should be used for platforms with hartid greater than BITS_PER_LONG. > + */ > + for_each_cpu(cpuid, cpu_mask) { > + hartid = cpuid_to_hartid_map(cpuid); > + if (hartid >= BITS_PER_LONG) { > + pr_warn("Unable to send any request to hartid > BITS_PER_LONG for SBI v0.1\n"); > + break; > + } > + hmask |= 1 << hartid; This should be 1UL otherwise hartid 31 and up cause UB. > + } > + > + return hmask; > +} > + > /** > * sbi_console_putchar() - Writes given character to the console device. > * @ch: The data to be written to the console. > @@ -132,33 +156,44 @@ static void __sbi_set_timer_v01(uint64_t stime_value) > #endif > } > > -static int __sbi_send_ipi_v01(const unsigned long *hart_mask) > +static int __sbi_send_ipi_v01(const struct cpumask *cpu_mask) > { > - sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)hart_mask, > + unsigned long hart_mask; > + > + if (!cpu_mask) > + cpu_mask = cpu_online_mask; > + hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask); > + > + sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)(&hart_mask), > 0, 0, 0, 0, 0); > return 0; > } > > -static int __sbi_rfence_v01(int fid, const unsigned long *hart_mask, > +static int __sbi_rfence_v01(int fid, const struct cpumask *cpu_mask, > unsigned long start, unsigned long size, > unsigned long arg4, unsigned long arg5) > { > int result = 0; > + unsigned long hart_mask; > + > + if (!cpu_mask) > + cpu_mask = cpu_online_mask; > + hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask); > > /* v0.2 function IDs are equivalent to v0.1 extension IDs */ > switch (fid) { > case SBI_EXT_RFENCE_REMOTE_FENCE_I: > sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0, > - (unsigned long)hart_mask, 0, 0, 0, 0, 0); > + (unsigned long)&hart_mask, 0, 0, 0, 0, 0); > break; > case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA: > sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0, > - (unsigned long)hart_mask, start, size, > + (unsigned long)&hart_mask, start, size, > 0, 0, 0); > break; > case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID: > sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0, > - (unsigned long)hart_mask, start, size, > + (unsigned long)&hart_mask, start, size, > arg4, 0, 0); > break; > default: > @@ -180,7 +215,7 @@ static void __sbi_set_timer_v01(uint64_t stime_value) > sbi_major_version(), sbi_minor_version()); > } > > -static int __sbi_send_ipi_v01(const unsigned long *hart_mask) > +static int __sbi_send_ipi_v01(const struct cpumask *cpu_mask) > { > pr_warn("IPI extension is not available in SBI v%lu.%lu\n", > sbi_major_version(), sbi_minor_version()); > @@ -188,7 +223,7 @@ static int __sbi_send_ipi_v01(const unsigned long *hart_mask) > return 0; > } > > -static int __sbi_rfence_v01(int fid, const unsigned long *hart_mask, > +static int __sbi_rfence_v01(int fid, const struct cpumask *cpu_mask, > unsigned long start, unsigned long size, > unsigned long arg4, unsigned long arg5) > { > @@ -212,37 +247,33 @@ static void __sbi_set_timer_v02(uint64_t stime_value) > #endif > } > > -static int __sbi_send_ipi_v02(const unsigned long *hart_mask) > +static int __sbi_send_ipi_v02(const struct cpumask *cpu_mask) > { > - unsigned long hartid, hmask_val, hbase; > - struct cpumask tmask; > + unsigned long hartid, cpuid, hmask = 0, hbase = 0; > struct sbiret ret = {0}; > int result; > > - if (!hart_mask || !(*hart_mask)) { > - riscv_cpuid_to_hartid_mask(cpu_online_mask, &tmask); > - hart_mask = cpumask_bits(&tmask); > - } > + if (!cpu_mask) > + cpu_mask = cpu_online_mask; This is a change in behaviour. Are you sure nothing passes an empty mask? > - hmask_val = 0; > - hbase = 0; > - for_each_set_bit(hartid, hart_mask, NR_CPUS) { > - if (hmask_val && ((hbase + BITS_PER_LONG) <= hartid)) { > + for_each_cpu(cpuid, cpu_mask) { > + hartid = cpuid_to_hartid_map(cpuid); > + if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) { > ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, > - hmask_val, hbase, 0, 0, 0, 0); > + hmask, hbase, 0, 0, 0, 0); > if (ret.error) > goto ecall_failed; > - hmask_val = 0; > + hmask = 0; > hbase = 0; > } > - if (!hmask_val) > + if (!hmask) > hbase = hartid; > - hmask_val |= 1UL << (hartid - hbase); > + hmask |= 1UL << (hartid - hbase); > } > > - if (hmask_val) { > + if (hmask) { > ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, > - hmask_val, hbase, 0, 0, 0, 0); > + hmask, hbase, 0, 0, 0, 0); > if (ret.error) > goto ecall_failed; > } > @@ -252,11 +283,11 @@ static int __sbi_send_ipi_v02(const unsigned long *hart_mask) > ecall_failed: > result = sbi_err_map_linux_errno(ret.error); > pr_err("%s: hbase = [%lu] hmask = [0x%lx] failed (error [%d])\n", > - __func__, hbase, hmask_val, result); > + __func__, hbase, hmask, result); > return result; > } > > -static int __sbi_rfence_v02_call(unsigned long fid, unsigned long hmask_val, > +static int __sbi_rfence_v02_call(unsigned long fid, unsigned long hmask, > unsigned long hbase, unsigned long start, > unsigned long size, unsigned long arg4, > unsigned long arg5) > @@ -267,31 +298,31 @@ static int __sbi_rfence_v02_call(unsigned long fid, unsigned long hmask_val, > > switch (fid) { > case SBI_EXT_RFENCE_REMOTE_FENCE_I: > - ret = sbi_ecall(ext, fid, hmask_val, hbase, 0, 0, 0, 0); > + ret = sbi_ecall(ext, fid, hmask, hbase, 0, 0, 0, 0); > break; > case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA: > - ret = sbi_ecall(ext, fid, hmask_val, hbase, start, > + ret = sbi_ecall(ext, fid, hmask, hbase, start, > size, 0, 0); > break; > case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID: > - ret = sbi_ecall(ext, fid, hmask_val, hbase, start, > + ret = sbi_ecall(ext, fid, hmask, hbase, start, > size, arg4, 0); > break; > > case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA: > - ret = sbi_ecall(ext, fid, hmask_val, hbase, start, > + ret = sbi_ecall(ext, fid, hmask, hbase, start, > size, 0, 0); > break; > case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID: > - ret = sbi_ecall(ext, fid, hmask_val, hbase, start, > + ret = sbi_ecall(ext, fid, hmask, hbase, start, > size, arg4, 0); > break; > case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA: > - ret = sbi_ecall(ext, fid, hmask_val, hbase, start, > + ret = sbi_ecall(ext, fid, hmask, hbase, start, > size, 0, 0); > break; > case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID: > - ret = sbi_ecall(ext, fid, hmask_val, hbase, start, > + ret = sbi_ecall(ext, fid, hmask, hbase, start, > size, arg4, 0); > break; > default: > @@ -303,43 +334,39 @@ static int __sbi_rfence_v02_call(unsigned long fid, unsigned long hmask_val, > if (ret.error) { > result = sbi_err_map_linux_errno(ret.error); > pr_err("%s: hbase = [%lu] hmask = [0x%lx] failed (error [%d])\n", > - __func__, hbase, hmask_val, result); > + __func__, hbase, hmask, result); > } > > return result; > } > > -static int __sbi_rfence_v02(int fid, const unsigned long *hart_mask, > +static int __sbi_rfence_v02(int fid, const struct cpumask *cpu_mask, > unsigned long start, unsigned long size, > unsigned long arg4, unsigned long arg5) > { > - unsigned long hmask_val, hartid, hbase; > - struct cpumask tmask; > + unsigned long hartid, cpuid, hmask = 0, hbase = 0; > int result; > > - if (!hart_mask || !(*hart_mask)) { > - riscv_cpuid_to_hartid_mask(cpu_online_mask, &tmask); > - hart_mask = cpumask_bits(&tmask); > - } > + if (!cpu_mask) > + cpu_mask = cpu_online_mask; As with __sbi_send_ipi_v02. Jess > - hmask_val = 0; > - hbase = 0; > - for_each_set_bit(hartid, hart_mask, NR_CPUS) { > - if (hmask_val && ((hbase + BITS_PER_LONG) <= hartid)) { > - result = __sbi_rfence_v02_call(fid, hmask_val, hbase, > + for_each_cpu(cpuid, cpu_mask) { > + hartid = cpuid_to_hartid_map(cpuid); > + if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) { > + result = __sbi_rfence_v02_call(fid, hmask, hbase, > start, size, arg4, arg5); > if (result) > return result; > - hmask_val = 0; > + hmask = 0; > hbase = 0; > } > - if (!hmask_val) > + if (!hmask) > hbase = hartid; > - hmask_val |= 1UL << (hartid - hbase); > + hmask |= 1UL << (hartid - hbase); > } > > - if (hmask_val) { > - result = __sbi_rfence_v02_call(fid, hmask_val, hbase, > + if (hmask) { > + result = __sbi_rfence_v02_call(fid, hmask, hbase, > start, size, arg4, arg5); > if (result) > return result; > @@ -361,44 +388,44 @@ void sbi_set_timer(uint64_t stime_value) > > /** > * sbi_send_ipi() - Send an IPI to any hart. > - * @hart_mask: A cpu mask containing all the target harts. > + * @cpu_mask: A cpu mask containing all the target harts. > * > * Return: 0 on success, appropriate linux error code otherwise. > */ > -int sbi_send_ipi(const unsigned long *hart_mask) > +int sbi_send_ipi(const struct cpumask *cpu_mask) > { > - return __sbi_send_ipi(hart_mask); > + return __sbi_send_ipi(cpu_mask); > } > EXPORT_SYMBOL(sbi_send_ipi); > > /** > * sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts. > - * @hart_mask: A cpu mask containing all the target harts. > + * @cpu_mask: A cpu mask containing all the target harts. > * > * Return: 0 on success, appropriate linux error code otherwise. > */ > -int sbi_remote_fence_i(const unsigned long *hart_mask) > +int sbi_remote_fence_i(const struct cpumask *cpu_mask) > { > return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_FENCE_I, > - hart_mask, 0, 0, 0, 0); > + cpu_mask, 0, 0, 0, 0); > } > EXPORT_SYMBOL(sbi_remote_fence_i); > > /** > * sbi_remote_sfence_vma() - Execute SFENCE.VMA instructions on given remote > * harts for the specified virtual address range. > - * @hart_mask: A cpu mask containing all the target harts. > + * @cpu_mask: A cpu mask containing all the target harts. > * @start: Start of the virtual address > * @size: Total size of the virtual address range. > * > * Return: 0 on success, appropriate linux error code otherwise. > */ > -int sbi_remote_sfence_vma(const unsigned long *hart_mask, > +int sbi_remote_sfence_vma(const struct cpumask *cpu_mask, > unsigned long start, > unsigned long size) > { > return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_SFENCE_VMA, > - hart_mask, start, size, 0, 0); > + cpu_mask, start, size, 0, 0); > } > EXPORT_SYMBOL(sbi_remote_sfence_vma); > > @@ -406,38 +433,38 @@ EXPORT_SYMBOL(sbi_remote_sfence_vma); > * sbi_remote_sfence_vma_asid() - Execute SFENCE.VMA instructions on given > * remote harts for a virtual address range belonging to a specific ASID. > * > - * @hart_mask: A cpu mask containing all the target harts. > + * @cpu_mask: A cpu mask containing all the target harts. > * @start: Start of the virtual address > * @size: Total size of the virtual address range. > * @asid: The value of address space identifier (ASID). > * > * Return: 0 on success, appropriate linux error code otherwise. > */ > -int sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, > +int sbi_remote_sfence_vma_asid(const struct cpumask *cpu_mask, > unsigned long start, > unsigned long size, > unsigned long asid) > { > return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID, > - hart_mask, start, size, asid, 0); > + cpu_mask, start, size, asid, 0); > } > EXPORT_SYMBOL(sbi_remote_sfence_vma_asid); > > /** > * sbi_remote_hfence_gvma() - Execute HFENCE.GVMA instructions on given remote > * harts for the specified guest physical address range. > - * @hart_mask: A cpu mask containing all the target harts. > + * @cpu_mask: A cpu mask containing all the target harts. > * @start: Start of the guest physical address > * @size: Total size of the guest physical address range. > * > * Return: None > */ > -int sbi_remote_hfence_gvma(const unsigned long *hart_mask, > +int sbi_remote_hfence_gvma(const struct cpumask *cpu_mask, > unsigned long start, > unsigned long size) > { > return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA, > - hart_mask, start, size, 0, 0); > + cpu_mask, start, size, 0, 0); > } > EXPORT_SYMBOL_GPL(sbi_remote_hfence_gvma); > > @@ -445,38 +472,38 @@ EXPORT_SYMBOL_GPL(sbi_remote_hfence_gvma); > * sbi_remote_hfence_gvma_vmid() - Execute HFENCE.GVMA instructions on given > * remote harts for a guest physical address range belonging to a specific VMID. > * > - * @hart_mask: A cpu mask containing all the target harts. > + * @cpu_mask: A cpu mask containing all the target harts. > * @start: Start of the guest physical address > * @size: Total size of the guest physical address range. > * @vmid: The value of guest ID (VMID). > * > * Return: 0 if success, Error otherwise. > */ > -int sbi_remote_hfence_gvma_vmid(const unsigned long *hart_mask, > +int sbi_remote_hfence_gvma_vmid(const struct cpumask *cpu_mask, > unsigned long start, > unsigned long size, > unsigned long vmid) > { > return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID, > - hart_mask, start, size, vmid, 0); > + cpu_mask, start, size, vmid, 0); > } > EXPORT_SYMBOL(sbi_remote_hfence_gvma_vmid); > > /** > * sbi_remote_hfence_vvma() - Execute HFENCE.VVMA instructions on given remote > * harts for the current guest virtual address range. > - * @hart_mask: A cpu mask containing all the target harts. > + * @cpu_mask: A cpu mask containing all the target harts. > * @start: Start of the current guest virtual address > * @size: Total size of the current guest virtual address range. > * > * Return: None > */ > -int sbi_remote_hfence_vvma(const unsigned long *hart_mask, > +int sbi_remote_hfence_vvma(const struct cpumask *cpu_mask, > unsigned long start, > unsigned long size) > { > return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA, > - hart_mask, start, size, 0, 0); > + cpu_mask, start, size, 0, 0); > } > EXPORT_SYMBOL(sbi_remote_hfence_vvma); > > @@ -485,20 +512,20 @@ EXPORT_SYMBOL(sbi_remote_hfence_vvma); > * remote harts for current guest virtual address range belonging to a specific > * ASID. > * > - * @hart_mask: A cpu mask containing all the target harts. > + * @cpu_mask: A cpu mask containing all the target harts. > * @start: Start of the current guest virtual address > * @size: Total size of the current guest virtual address range. > * @asid: The value of address space identifier (ASID). > * > * Return: None > */ > -int sbi_remote_hfence_vvma_asid(const unsigned long *hart_mask, > +int sbi_remote_hfence_vvma_asid(const struct cpumask *cpu_mask, > unsigned long start, > unsigned long size, > unsigned long asid) > { > return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID, > - hart_mask, start, size, asid, 0); > + cpu_mask, start, size, asid, 0); > } > EXPORT_SYMBOL(sbi_remote_hfence_vvma_asid); > > @@ -591,11 +618,7 @@ long sbi_get_mimpid(void) > > static void sbi_send_cpumask_ipi(const struct cpumask *target) > { > - struct cpumask hartid_mask; > - > - riscv_cpuid_to_hartid_mask(target, &hartid_mask); > - > - sbi_send_ipi(cpumask_bits(&hartid_mask)); > + sbi_send_ipi(target); > } > > static const struct riscv_ipi_ops sbi_ipi_ops = { > diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c > index 63241abe84eb..b42bfdc67482 100644 > --- a/arch/riscv/kernel/setup.c > +++ b/arch/riscv/kernel/setup.c > @@ -59,16 +59,6 @@ atomic_t hart_lottery __section(".sdata") > unsigned long boot_cpu_hartid; > static DEFINE_PER_CPU(struct cpu, cpu_devices); > > -void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out) > -{ > - int cpu; > - > - cpumask_clear(out); > - for_each_cpu(cpu, in) > - cpumask_set_cpu(cpuid_to_hartid_map(cpu), out); > -} > -EXPORT_SYMBOL_GPL(riscv_cpuid_to_hartid_mask); > - > /* > * Place kernel memory regions on the resource tree so that > * kexec-tools can retrieve them from /proc/iomem. While there > diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c > index bd82375db51a..622f226454d5 100644 > --- a/arch/riscv/kernel/smpboot.c > +++ b/arch/riscv/kernel/smpboot.c > @@ -96,7 +96,7 @@ void __init setup_smp(void) > if (cpuid >= NR_CPUS) { > pr_warn("Invalid cpuid [%d] for hartid [%d]\n", > cpuid, hart); > - break; > + continue; > } > > cpuid_to_hartid_map(cpuid) = hart; > diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c > index 9af67dbdc66a..f80a34fbf102 100644 > --- a/arch/riscv/kvm/mmu.c > +++ b/arch/riscv/kvm/mmu.c > @@ -114,7 +114,6 @@ static bool stage2_get_leaf_entry(struct kvm *kvm, gpa_t addr, > > static void stage2_remote_tlb_flush(struct kvm *kvm, u32 level, gpa_t addr) > { > - struct cpumask hmask; > unsigned long size = PAGE_SIZE; > struct kvm_vmid *vmid = &kvm->arch.vmid; > > @@ -127,8 +126,7 @@ static void stage2_remote_tlb_flush(struct kvm *kvm, u32 level, gpa_t addr) > * where the Guest/VM is running. > */ > preempt_disable(); > - riscv_cpuid_to_hartid_mask(cpu_online_mask, &hmask); > - sbi_remote_hfence_gvma_vmid(cpumask_bits(&hmask), addr, size, > + sbi_remote_hfence_gvma_vmid(cpu_online_mask, addr, size, > READ_ONCE(vmid->vmid)); > preempt_enable(); > } > diff --git a/arch/riscv/kvm/vcpu_sbi_replace.c b/arch/riscv/kvm/vcpu_sbi_replace.c > index 00036b7f83b9..1bc0608a5bfd 100644 > --- a/arch/riscv/kvm/vcpu_sbi_replace.c > +++ b/arch/riscv/kvm/vcpu_sbi_replace.c > @@ -82,7 +82,7 @@ static int kvm_sbi_ext_rfence_handler(struct kvm_vcpu *vcpu, struct kvm_run *run > { > int ret = 0; > unsigned long i; > - struct cpumask cm, hm; > + struct cpumask cm; > struct kvm_vcpu *tmp; > struct kvm_cpu_context *cp = &vcpu->arch.guest_context; > unsigned long hmask = cp->a0; > @@ -90,7 +90,6 @@ static int kvm_sbi_ext_rfence_handler(struct kvm_vcpu *vcpu, struct kvm_run *run > unsigned long funcid = cp->a6; > > cpumask_clear(&cm); > - cpumask_clear(&hm); > kvm_for_each_vcpu(i, tmp, vcpu->kvm) { > if (hbase != -1UL) { > if (tmp->vcpu_id < hbase) > @@ -103,17 +102,15 @@ static int kvm_sbi_ext_rfence_handler(struct kvm_vcpu *vcpu, struct kvm_run *run > cpumask_set_cpu(tmp->cpu, &cm); > } > > - riscv_cpuid_to_hartid_mask(&cm, &hm); > - > switch (funcid) { > case SBI_EXT_RFENCE_REMOTE_FENCE_I: > - ret = sbi_remote_fence_i(cpumask_bits(&hm)); > + ret = sbi_remote_fence_i(&cm); > break; > case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA: > - ret = sbi_remote_hfence_vvma(cpumask_bits(&hm), cp->a2, cp->a3); > + ret = sbi_remote_hfence_vvma(&cm, cp->a2, cp->a3); > break; > case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID: > - ret = sbi_remote_hfence_vvma_asid(cpumask_bits(&hm), cp->a2, > + ret = sbi_remote_hfence_vvma_asid(&cm, cp->a2, > cp->a3, cp->a4); > break; > case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA: > diff --git a/arch/riscv/kvm/vcpu_sbi_v01.c b/arch/riscv/kvm/vcpu_sbi_v01.c > index 4c7e13ec9ccc..07e2de14433a 100644 > --- a/arch/riscv/kvm/vcpu_sbi_v01.c > +++ b/arch/riscv/kvm/vcpu_sbi_v01.c > @@ -38,7 +38,7 @@ static int kvm_sbi_ext_v01_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, > int i, ret = 0; > u64 next_cycle; > struct kvm_vcpu *rvcpu; > - struct cpumask cm, hm; > + struct cpumask cm; > struct kvm *kvm = vcpu->kvm; > struct kvm_cpu_context *cp = &vcpu->arch.guest_context; > > @@ -101,15 +101,12 @@ static int kvm_sbi_ext_v01_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, > continue; > cpumask_set_cpu(rvcpu->cpu, &cm); > } > - riscv_cpuid_to_hartid_mask(&cm, &hm); > if (cp->a7 == SBI_EXT_0_1_REMOTE_FENCE_I) > - ret = sbi_remote_fence_i(cpumask_bits(&hm)); > + ret = sbi_remote_fence_i(&cm); > else if (cp->a7 == SBI_EXT_0_1_REMOTE_SFENCE_VMA) > - ret = sbi_remote_hfence_vvma(cpumask_bits(&hm), > - cp->a1, cp->a2); > + ret = sbi_remote_hfence_vvma(&cm, cp->a1, cp->a2); > else > - ret = sbi_remote_hfence_vvma_asid(cpumask_bits(&hm), > - cp->a1, cp->a2, cp->a3); > + ret = sbi_remote_hfence_vvma_asid(&cm, cp->a1, cp->a2, cp->a3); > break; > default: > ret = -EINVAL; > diff --git a/arch/riscv/kvm/vmid.c b/arch/riscv/kvm/vmid.c > index 807228f8f409..2fa4f7b1813d 100644 > --- a/arch/riscv/kvm/vmid.c > +++ b/arch/riscv/kvm/vmid.c > @@ -67,7 +67,6 @@ void kvm_riscv_stage2_vmid_update(struct kvm_vcpu *vcpu) > { > unsigned long i; > struct kvm_vcpu *v; > - struct cpumask hmask; > struct kvm_vmid *vmid = &vcpu->kvm->arch.vmid; > > if (!kvm_riscv_stage2_vmid_ver_changed(vmid)) > @@ -102,8 +101,7 @@ void kvm_riscv_stage2_vmid_update(struct kvm_vcpu *vcpu) > * running, we force VM exits on all host CPUs using IPI and > * flush all Guest TLBs. > */ > - riscv_cpuid_to_hartid_mask(cpu_online_mask, &hmask); > - sbi_remote_hfence_gvma(cpumask_bits(&hmask), 0, 0); > + sbi_remote_hfence_gvma(cpu_online_mask, 0, 0); > } > > vmid->vmid = vmid_next; > diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c > index 89f81067e09e..6cb7d96ad9c7 100644 > --- a/arch/riscv/mm/cacheflush.c > +++ b/arch/riscv/mm/cacheflush.c > @@ -67,10 +67,7 @@ void flush_icache_mm(struct mm_struct *mm, bool local) > */ > smp_mb(); > } else if (IS_ENABLED(CONFIG_RISCV_SBI)) { > - cpumask_t hartid_mask; > - > - riscv_cpuid_to_hartid_mask(&others, &hartid_mask); > - sbi_remote_fence_i(cpumask_bits(&hartid_mask)); > + sbi_remote_fence_i(&others); > } else { > on_each_cpu_mask(&others, ipi_remote_fence_i, NULL, 1); > } > diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c > index 64f8201237c2..37ed760d007c 100644 > --- a/arch/riscv/mm/tlbflush.c > +++ b/arch/riscv/mm/tlbflush.c > @@ -32,7 +32,6 @@ static void __sbi_tlb_flush_range(struct mm_struct *mm, unsigned long start, > unsigned long size, unsigned long stride) > { > struct cpumask *cmask = mm_cpumask(mm); > - struct cpumask hmask; > unsigned int cpuid; > bool broadcast; > > @@ -46,9 +45,7 @@ static void __sbi_tlb_flush_range(struct mm_struct *mm, unsigned long start, > unsigned long asid = atomic_long_read(&mm->context.id); > > if (broadcast) { > - riscv_cpuid_to_hartid_mask(cmask, &hmask); > - sbi_remote_sfence_vma_asid(cpumask_bits(&hmask), > - start, size, asid); > + sbi_remote_sfence_vma_asid(cmask, start, size, asid); > } else if (size <= stride) { > local_flush_tlb_page_asid(start, asid); > } else { > @@ -56,9 +53,7 @@ static void __sbi_tlb_flush_range(struct mm_struct *mm, unsigned long start, > } > } else { > if (broadcast) { > - riscv_cpuid_to_hartid_mask(cmask, &hmask); > - sbi_remote_sfence_vma(cpumask_bits(&hmask), > - start, size); > + sbi_remote_sfence_vma(cmask, start, size); > } else if (size <= stride) { > local_flush_tlb_page(start); > } else { > -- > 2.30.2 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
> On 20 Jan 2022, at 09:09, Atish Patra <atishp@rivosinc.com> wrote: > > > > Currently, SBI APIs accept a hartmask that is generated from struct > > cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it > > is not the correct data structure for hartids as it can be higher > > than NR_CPUs for platforms with sparse or discontguous hartids. > > > > Remove all association between hartid mask and struct cpumask. .... > > -static int __sbi_rfence_v01(int fid, const unsigned long *hart_mask, > > +static int __sbi_rfence_v01(int fid, const struct cpumask *cpu_mask, > > unsigned long start, unsigned long size, > > unsigned long arg4, unsigned long arg5) > > { > > int result = 0; > > + unsigned long hart_mask; > > + > > + if (!cpu_mask) > > + cpu_mask = cpu_online_mask; > > + hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask); > > > > /* v0.2 function IDs are equivalent to v0.1 extension IDs */ > > switch (fid) { > > case SBI_EXT_RFENCE_REMOTE_FENCE_I: > > sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0, > > - (unsigned long)hart_mask, 0, 0, 0, 0, 0); > > + (unsigned long)&hart_mask, 0, 0, 0, 0, 0); You don't need the cast. David - Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK Registration No: 1397386 (Wales)
On Tue, Jan 25, 2022 at 2:26 PM Jessica Clarke <jrtc27@jrtc27.com> wrote: > > On 20 Jan 2022, at 09:09, Atish Patra <atishp@rivosinc.com> wrote: > > > > Currently, SBI APIs accept a hartmask that is generated from struct > > cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it > > is not the correct data structure for hartids as it can be higher > > than NR_CPUs for platforms with sparse or discontguous hartids. > > > > Remove all association between hartid mask and struct cpumask. > > > > Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes) > > Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes) > > Signed-off-by: Atish Patra <atishp@rivosinc.com> > > --- > > arch/riscv/include/asm/sbi.h | 19 +-- > > arch/riscv/include/asm/smp.h | 2 - > > arch/riscv/kernel/sbi.c | 189 +++++++++++++++++------------- > > arch/riscv/kernel/setup.c | 10 -- > > arch/riscv/kernel/smpboot.c | 2 +- > > arch/riscv/kvm/mmu.c | 4 +- > > arch/riscv/kvm/vcpu_sbi_replace.c | 11 +- > > arch/riscv/kvm/vcpu_sbi_v01.c | 11 +- > > arch/riscv/kvm/vmid.c | 4 +- > > arch/riscv/mm/cacheflush.c | 5 +- > > arch/riscv/mm/tlbflush.c | 9 +- > > 11 files changed, 130 insertions(+), 136 deletions(-) > > > > diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h > > index 26ba6f2d7a40..d1c37479d828 100644 > > --- a/arch/riscv/include/asm/sbi.h > > +++ b/arch/riscv/include/asm/sbi.h > > @@ -8,6 +8,7 @@ > > #define _ASM_RISCV_SBI_H > > > > #include <linux/types.h> > > +#include <linux/cpumask.h> > > > > #ifdef CONFIG_RISCV_SBI > > enum sbi_ext_id { > > @@ -128,27 +129,27 @@ long sbi_get_mimpid(void); > > void sbi_set_timer(uint64_t stime_value); > > void sbi_shutdown(void); > > void sbi_clear_ipi(void); > > -int sbi_send_ipi(const unsigned long *hart_mask); > > -int sbi_remote_fence_i(const unsigned long *hart_mask); > > -int sbi_remote_sfence_vma(const unsigned long *hart_mask, > > +int sbi_send_ipi(const struct cpumask *cpu_mask); > > +int sbi_remote_fence_i(const struct cpumask *cpu_mask); > > +int sbi_remote_sfence_vma(const struct cpumask *cpu_mask, > > unsigned long start, > > unsigned long size); > > > > -int sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, > > +int sbi_remote_sfence_vma_asid(const struct cpumask *cpu_mask, > > unsigned long start, > > unsigned long size, > > unsigned long asid); > > -int sbi_remote_hfence_gvma(const unsigned long *hart_mask, > > +int sbi_remote_hfence_gvma(const struct cpumask *cpu_mask, > > unsigned long start, > > unsigned long size); > > -int sbi_remote_hfence_gvma_vmid(const unsigned long *hart_mask, > > +int sbi_remote_hfence_gvma_vmid(const struct cpumask *cpu_mask, > > unsigned long start, > > unsigned long size, > > unsigned long vmid); > > -int sbi_remote_hfence_vvma(const unsigned long *hart_mask, > > +int sbi_remote_hfence_vvma(const struct cpumask *cpu_mask, > > unsigned long start, > > unsigned long size); > > -int sbi_remote_hfence_vvma_asid(const unsigned long *hart_mask, > > +int sbi_remote_hfence_vvma_asid(const struct cpumask *cpu_mask, > > unsigned long start, > > unsigned long size, > > unsigned long asid); > > @@ -183,7 +184,7 @@ static inline unsigned long sbi_mk_version(unsigned long major, > > > > int sbi_err_map_linux_errno(int err); > > #else /* CONFIG_RISCV_SBI */ > > -static inline int sbi_remote_fence_i(const unsigned long *hart_mask) { return -1; } > > +static inline int sbi_remote_fence_i(const struct cpumask *cpu_mask) { return -1; } > > static inline void sbi_init(void) {} > > #endif /* CONFIG_RISCV_SBI */ > > #endif /* _ASM_RISCV_SBI_H */ > > diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h > > index 6ad749f42807..23170c933d73 100644 > > --- a/arch/riscv/include/asm/smp.h > > +++ b/arch/riscv/include/asm/smp.h > > @@ -92,8 +92,6 @@ static inline void riscv_clear_ipi(void) > > > > #endif /* CONFIG_SMP */ > > > > -void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out); > > - > > #if defined(CONFIG_HOTPLUG_CPU) && (CONFIG_SMP) > > bool cpu_has_hotplug(unsigned int cpu); > > #else > > diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c > > index 9a84f0cb5175..f72527fcb347 100644 > > --- a/arch/riscv/kernel/sbi.c > > +++ b/arch/riscv/kernel/sbi.c > > @@ -16,8 +16,8 @@ unsigned long sbi_spec_version __ro_after_init = SBI_SPEC_VERSION_DEFAULT; > > EXPORT_SYMBOL(sbi_spec_version); > > > > static void (*__sbi_set_timer)(uint64_t stime) __ro_after_init; > > -static int (*__sbi_send_ipi)(const unsigned long *hart_mask) __ro_after_init; > > -static int (*__sbi_rfence)(int fid, const unsigned long *hart_mask, > > +static int (*__sbi_send_ipi)(const struct cpumask *cpu_mask) __ro_after_init; > > +static int (*__sbi_rfence)(int fid, const struct cpumask *cpu_mask, > > unsigned long start, unsigned long size, > > unsigned long arg4, unsigned long arg5) __ro_after_init; > > > > @@ -67,6 +67,30 @@ int sbi_err_map_linux_errno(int err) > > EXPORT_SYMBOL(sbi_err_map_linux_errno); > > > > #ifdef CONFIG_RISCV_SBI_V01 > > +static unsigned long __sbi_v01_cpumask_to_hartmask(const struct cpumask *cpu_mask) > > +{ > > + unsigned long cpuid, hartid; > > + unsigned long hmask = 0; > > + > > + /* > > + * There is no maximum hartid concept in RISC-V and NR_CPUS must not be > > + * associated with hartid. As SBI v0.1 is only kept for backward compatibility > > + * and will be removed in the future, there is no point in supporting hartid > > + * greater than BITS_PER_LONG (32 for RV32 and 64 for RV64). Ideally, SBI v0.2 > > + * should be used for platforms with hartid greater than BITS_PER_LONG. > > + */ > > + for_each_cpu(cpuid, cpu_mask) { > > + hartid = cpuid_to_hartid_map(cpuid); > > + if (hartid >= BITS_PER_LONG) { > > + pr_warn("Unable to send any request to hartid > BITS_PER_LONG for SBI v0.1\n"); > > + break; > > + } > > + hmask |= 1 << hartid; > > This should be 1UL otherwise hartid 31 and up cause UB. > Yeah. Thanks for catching it. > > + } > > + > > + return hmask; > > +} > > + > > /** > > * sbi_console_putchar() - Writes given character to the console device. > > * @ch: The data to be written to the console. > > @@ -132,33 +156,44 @@ static void __sbi_set_timer_v01(uint64_t stime_value) > > #endif > > } > > > > -static int __sbi_send_ipi_v01(const unsigned long *hart_mask) > > +static int __sbi_send_ipi_v01(const struct cpumask *cpu_mask) > > { > > - sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)hart_mask, > > + unsigned long hart_mask; > > + > > + if (!cpu_mask) > > + cpu_mask = cpu_online_mask; > > + hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask); > > + > > + sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)(&hart_mask), > > 0, 0, 0, 0, 0); > > return 0; > > } > > > > -static int __sbi_rfence_v01(int fid, const unsigned long *hart_mask, > > +static int __sbi_rfence_v01(int fid, const struct cpumask *cpu_mask, > > unsigned long start, unsigned long size, > > unsigned long arg4, unsigned long arg5) > > { > > int result = 0; > > + unsigned long hart_mask; > > + > > + if (!cpu_mask) > > + cpu_mask = cpu_online_mask; > > + hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask); > > > > /* v0.2 function IDs are equivalent to v0.1 extension IDs */ > > switch (fid) { > > case SBI_EXT_RFENCE_REMOTE_FENCE_I: > > sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0, > > - (unsigned long)hart_mask, 0, 0, 0, 0, 0); > > + (unsigned long)&hart_mask, 0, 0, 0, 0, 0); > > break; > > case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA: > > sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0, > > - (unsigned long)hart_mask, start, size, > > + (unsigned long)&hart_mask, start, size, > > 0, 0, 0); > > break; > > case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID: > > sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0, > > - (unsigned long)hart_mask, start, size, > > + (unsigned long)&hart_mask, start, size, > > arg4, 0, 0); > > break; > > default: > > @@ -180,7 +215,7 @@ static void __sbi_set_timer_v01(uint64_t stime_value) > > sbi_major_version(), sbi_minor_version()); > > } > > > > -static int __sbi_send_ipi_v01(const unsigned long *hart_mask) > > +static int __sbi_send_ipi_v01(const struct cpumask *cpu_mask) > > { > > pr_warn("IPI extension is not available in SBI v%lu.%lu\n", > > sbi_major_version(), sbi_minor_version()); > > @@ -188,7 +223,7 @@ static int __sbi_send_ipi_v01(const unsigned long *hart_mask) > > return 0; > > } > > > > -static int __sbi_rfence_v01(int fid, const unsigned long *hart_mask, > > +static int __sbi_rfence_v01(int fid, const struct cpumask *cpu_mask, > > unsigned long start, unsigned long size, > > unsigned long arg4, unsigned long arg5) > > { > > @@ -212,37 +247,33 @@ static void __sbi_set_timer_v02(uint64_t stime_value) > > #endif > > } > > > > -static int __sbi_send_ipi_v02(const unsigned long *hart_mask) > > +static int __sbi_send_ipi_v02(const struct cpumask *cpu_mask) > > { > > - unsigned long hartid, hmask_val, hbase; > > - struct cpumask tmask; > > + unsigned long hartid, cpuid, hmask = 0, hbase = 0; > > struct sbiret ret = {0}; > > int result; > > > > - if (!hart_mask || !(*hart_mask)) { > > - riscv_cpuid_to_hartid_mask(cpu_online_mask, &tmask); > > - hart_mask = cpumask_bits(&tmask); > > - } > > + if (!cpu_mask) > > + cpu_mask = cpu_online_mask; > > This is a change in behaviour. Are you sure nothing passes an empty mask? > The change in behavior is not intentional. I am yet to reproduce it on my end. @Geert Uytterhoeven: can you please try the below diff on your end. diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c index f72527fcb347..ca1c617407b4 100644 --- a/arch/riscv/kernel/sbi.c +++ b/arch/riscv/kernel/sbi.c @@ -85,7 +85,7 @@ static unsigned long __sbi_v01_cpumask_to_hartmask(const struct cpumask *cpu_mas pr_warn("Unable to send any request to hartid > BITS_PER_LONG for SBI v0.1\n"); break; } - hmask |= 1 << hartid; + hmask |= 1UL << hartid; } return hmask; @@ -160,7 +160,7 @@ static int __sbi_send_ipi_v01(const struct cpumask *cpu_mask) { unsigned long hart_mask; - if (!cpu_mask) + if (!cpu_mask || cpumask_empty(cpu_mask)) cpu_mask = cpu_online_mask; hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask); @@ -176,7 +176,7 @@ static int __sbi_rfence_v01(int fid, const struct cpumask *cpu_mask, int result = 0; unsigned long hart_mask; - if (!cpu_mask) + if (!cpu_mask || cpumask_empty(cpu_mask)) cpu_mask = cpu_online_mask; hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask); @@ -253,7 +253,7 @@ static int __sbi_send_ipi_v02(const struct cpumask *cpu_mask) struct sbiret ret = {0}; int result; - if (!cpu_mask) + if (!cpu_mask || cpumask_empty(cpu_mask)) cpu_mask = cpu_online_mask; for_each_cpu(cpuid, cpu_mask) { @@ -347,7 +347,7 @@ static int __sbi_rfence_v02(int fid, const struct cpumask *cpu_mask, unsigned long hartid, cpuid, hmask = 0, hbase = 0; int result; - if (!cpu_mask) + if (!cpu_mask || cpumask_empty(cpu_mask)) cpu_mask = cpu_online_mask; > > - hmask_val = 0; > > - hbase = 0; > > - for_each_set_bit(hartid, hart_mask, NR_CPUS) { > > - if (hmask_val && ((hbase + BITS_PER_LONG) <= hartid)) { > > + for_each_cpu(cpuid, cpu_mask) { > > + hartid = cpuid_to_hartid_map(cpuid); > > + if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) { > > ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, > > - hmask_val, hbase, 0, 0, 0, 0); > > + hmask, hbase, 0, 0, 0, 0); > > if (ret.error) > > goto ecall_failed; > > - hmask_val = 0; > > + hmask = 0; > > hbase = 0; > > } > > - if (!hmask_val) > > + if (!hmask) > > hbase = hartid; > > - hmask_val |= 1UL << (hartid - hbase); > > + hmask |= 1UL << (hartid - hbase); > > } > > > > - if (hmask_val) { > > + if (hmask) { > > ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, > > - hmask_val, hbase, 0, 0, 0, 0); > > + hmask, hbase, 0, 0, 0, 0); > > if (ret.error) > > goto ecall_failed; > > } > > @@ -252,11 +283,11 @@ static int __sbi_send_ipi_v02(const unsigned long *hart_mask) > > ecall_failed: > > result = sbi_err_map_linux_errno(ret.error); > > pr_err("%s: hbase = [%lu] hmask = [0x%lx] failed (error [%d])\n", > > - __func__, hbase, hmask_val, result); > > + __func__, hbase, hmask, result); > > return result; > > } > > > > -static int __sbi_rfence_v02_call(unsigned long fid, unsigned long hmask_val, > > +static int __sbi_rfence_v02_call(unsigned long fid, unsigned long hmask, > > unsigned long hbase, unsigned long start, > > unsigned long size, unsigned long arg4, > > unsigned long arg5) > > @@ -267,31 +298,31 @@ static int __sbi_rfence_v02_call(unsigned long fid, unsigned long hmask_val, > > > > switch (fid) { > > case SBI_EXT_RFENCE_REMOTE_FENCE_I: > > - ret = sbi_ecall(ext, fid, hmask_val, hbase, 0, 0, 0, 0); > > + ret = sbi_ecall(ext, fid, hmask, hbase, 0, 0, 0, 0); > > break; > > case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA: > > - ret = sbi_ecall(ext, fid, hmask_val, hbase, start, > > + ret = sbi_ecall(ext, fid, hmask, hbase, start, > > size, 0, 0); > > break; > > case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID: > > - ret = sbi_ecall(ext, fid, hmask_val, hbase, start, > > + ret = sbi_ecall(ext, fid, hmask, hbase, start, > > size, arg4, 0); > > break; > > > > case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA: > > - ret = sbi_ecall(ext, fid, hmask_val, hbase, start, > > + ret = sbi_ecall(ext, fid, hmask, hbase, start, > > size, 0, 0); > > break; > > case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID: > > - ret = sbi_ecall(ext, fid, hmask_val, hbase, start, > > + ret = sbi_ecall(ext, fid, hmask, hbase, start, > > size, arg4, 0); > > break; > > case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA: > > - ret = sbi_ecall(ext, fid, hmask_val, hbase, start, > > + ret = sbi_ecall(ext, fid, hmask, hbase, start, > > size, 0, 0); > > break; > > case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID: > > - ret = sbi_ecall(ext, fid, hmask_val, hbase, start, > > + ret = sbi_ecall(ext, fid, hmask, hbase, start, > > size, arg4, 0); > > break; > > default: > > @@ -303,43 +334,39 @@ static int __sbi_rfence_v02_call(unsigned long fid, unsigned long hmask_val, > > if (ret.error) { > > result = sbi_err_map_linux_errno(ret.error); > > pr_err("%s: hbase = [%lu] hmask = [0x%lx] failed (error [%d])\n", > > - __func__, hbase, hmask_val, result); > > + __func__, hbase, hmask, result); > > } > > > > return result; > > } > > > > -static int __sbi_rfence_v02(int fid, const unsigned long *hart_mask, > > +static int __sbi_rfence_v02(int fid, const struct cpumask *cpu_mask, > > unsigned long start, unsigned long size, > > unsigned long arg4, unsigned long arg5) > > { > > - unsigned long hmask_val, hartid, hbase; > > - struct cpumask tmask; > > + unsigned long hartid, cpuid, hmask = 0, hbase = 0; > > int result; > > > > - if (!hart_mask || !(*hart_mask)) { > > - riscv_cpuid_to_hartid_mask(cpu_online_mask, &tmask); > > - hart_mask = cpumask_bits(&tmask); > > - } > > + if (!cpu_mask) > > + cpu_mask = cpu_online_mask; > > As with __sbi_send_ipi_v02. > > Jess > > > - hmask_val = 0; > > - hbase = 0; > > - for_each_set_bit(hartid, hart_mask, NR_CPUS) { > > - if (hmask_val && ((hbase + BITS_PER_LONG) <= hartid)) { > > - result = __sbi_rfence_v02_call(fid, hmask_val, hbase, > > + for_each_cpu(cpuid, cpu_mask) { > > + hartid = cpuid_to_hartid_map(cpuid); > > + if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) { > > + result = __sbi_rfence_v02_call(fid, hmask, hbase, > > start, size, arg4, arg5); > > if (result) > > return result; > > - hmask_val = 0; > > + hmask = 0; > > hbase = 0; > > } > > - if (!hmask_val) > > + if (!hmask) > > hbase = hartid; > > - hmask_val |= 1UL << (hartid - hbase); > > + hmask |= 1UL << (hartid - hbase); > > } > > > > - if (hmask_val) { > > - result = __sbi_rfence_v02_call(fid, hmask_val, hbase, > > + if (hmask) { > > + result = __sbi_rfence_v02_call(fid, hmask, hbase, > > start, size, arg4, arg5); > > if (result) > > return result; > > @@ -361,44 +388,44 @@ void sbi_set_timer(uint64_t stime_value) > > > > /** > > * sbi_send_ipi() - Send an IPI to any hart. > > - * @hart_mask: A cpu mask containing all the target harts. > > + * @cpu_mask: A cpu mask containing all the target harts. > > * > > * Return: 0 on success, appropriate linux error code otherwise. > > */ > > -int sbi_send_ipi(const unsigned long *hart_mask) > > +int sbi_send_ipi(const struct cpumask *cpu_mask) > > { > > - return __sbi_send_ipi(hart_mask); > > + return __sbi_send_ipi(cpu_mask); > > } > > EXPORT_SYMBOL(sbi_send_ipi); > > > > /** > > * sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts. > > - * @hart_mask: A cpu mask containing all the target harts. > > + * @cpu_mask: A cpu mask containing all the target harts. > > * > > * Return: 0 on success, appropriate linux error code otherwise. > > */ > > -int sbi_remote_fence_i(const unsigned long *hart_mask) > > +int sbi_remote_fence_i(const struct cpumask *cpu_mask) > > { > > return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_FENCE_I, > > - hart_mask, 0, 0, 0, 0); > > + cpu_mask, 0, 0, 0, 0); > > } > > EXPORT_SYMBOL(sbi_remote_fence_i); > > > > /** > > * sbi_remote_sfence_vma() - Execute SFENCE.VMA instructions on given remote > > * harts for the specified virtual address range. > > - * @hart_mask: A cpu mask containing all the target harts. > > + * @cpu_mask: A cpu mask containing all the target harts. > > * @start: Start of the virtual address > > * @size: Total size of the virtual address range. > > * > > * Return: 0 on success, appropriate linux error code otherwise. > > */ > > -int sbi_remote_sfence_vma(const unsigned long *hart_mask, > > +int sbi_remote_sfence_vma(const struct cpumask *cpu_mask, > > unsigned long start, > > unsigned long size) > > { > > return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_SFENCE_VMA, > > - hart_mask, start, size, 0, 0); > > + cpu_mask, start, size, 0, 0); > > } > > EXPORT_SYMBOL(sbi_remote_sfence_vma); > > > > @@ -406,38 +433,38 @@ EXPORT_SYMBOL(sbi_remote_sfence_vma); > > * sbi_remote_sfence_vma_asid() - Execute SFENCE.VMA instructions on given > > * remote harts for a virtual address range belonging to a specific ASID. > > * > > - * @hart_mask: A cpu mask containing all the target harts. > > + * @cpu_mask: A cpu mask containing all the target harts. > > * @start: Start of the virtual address > > * @size: Total size of the virtual address range. > > * @asid: The value of address space identifier (ASID). > > * > > * Return: 0 on success, appropriate linux error code otherwise. > > */ > > -int sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, > > +int sbi_remote_sfence_vma_asid(const struct cpumask *cpu_mask, > > unsigned long start, > > unsigned long size, > > unsigned long asid) > > { > > return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID, > > - hart_mask, start, size, asid, 0); > > + cpu_mask, start, size, asid, 0); > > } > > EXPORT_SYMBOL(sbi_remote_sfence_vma_asid); > > > > /** > > * sbi_remote_hfence_gvma() - Execute HFENCE.GVMA instructions on given remote > > * harts for the specified guest physical address range. > > - * @hart_mask: A cpu mask containing all the target harts. > > + * @cpu_mask: A cpu mask containing all the target harts. > > * @start: Start of the guest physical address > > * @size: Total size of the guest physical address range. > > * > > * Return: None > > */ > > -int sbi_remote_hfence_gvma(const unsigned long *hart_mask, > > +int sbi_remote_hfence_gvma(const struct cpumask *cpu_mask, > > unsigned long start, > > unsigned long size) > > { > > return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA, > > - hart_mask, start, size, 0, 0); > > + cpu_mask, start, size, 0, 0); > > } > > EXPORT_SYMBOL_GPL(sbi_remote_hfence_gvma); > > > > @@ -445,38 +472,38 @@ EXPORT_SYMBOL_GPL(sbi_remote_hfence_gvma); > > * sbi_remote_hfence_gvma_vmid() - Execute HFENCE.GVMA instructions on given > > * remote harts for a guest physical address range belonging to a specific VMID. > > * > > - * @hart_mask: A cpu mask containing all the target harts. > > + * @cpu_mask: A cpu mask containing all the target harts. > > * @start: Start of the guest physical address > > * @size: Total size of the guest physical address range. > > * @vmid: The value of guest ID (VMID). > > * > > * Return: 0 if success, Error otherwise. > > */ > > -int sbi_remote_hfence_gvma_vmid(const unsigned long *hart_mask, > > +int sbi_remote_hfence_gvma_vmid(const struct cpumask *cpu_mask, > > unsigned long start, > > unsigned long size, > > unsigned long vmid) > > { > > return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID, > > - hart_mask, start, size, vmid, 0); > > + cpu_mask, start, size, vmid, 0); > > } > > EXPORT_SYMBOL(sbi_remote_hfence_gvma_vmid); > > > > /** > > * sbi_remote_hfence_vvma() - Execute HFENCE.VVMA instructions on given remote > > * harts for the current guest virtual address range. > > - * @hart_mask: A cpu mask containing all the target harts. > > + * @cpu_mask: A cpu mask containing all the target harts. > > * @start: Start of the current guest virtual address > > * @size: Total size of the current guest virtual address range. > > * > > * Return: None > > */ > > -int sbi_remote_hfence_vvma(const unsigned long *hart_mask, > > +int sbi_remote_hfence_vvma(const struct cpumask *cpu_mask, > > unsigned long start, > > unsigned long size) > > { > > return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA, > > - hart_mask, start, size, 0, 0); > > + cpu_mask, start, size, 0, 0); > > } > > EXPORT_SYMBOL(sbi_remote_hfence_vvma); > > > > @@ -485,20 +512,20 @@ EXPORT_SYMBOL(sbi_remote_hfence_vvma); > > * remote harts for current guest virtual address range belonging to a specific > > * ASID. > > * > > - * @hart_mask: A cpu mask containing all the target harts. > > + * @cpu_mask: A cpu mask containing all the target harts. > > * @start: Start of the current guest virtual address > > * @size: Total size of the current guest virtual address range. > > * @asid: The value of address space identifier (ASID). > > * > > * Return: None > > */ > > -int sbi_remote_hfence_vvma_asid(const unsigned long *hart_mask, > > +int sbi_remote_hfence_vvma_asid(const struct cpumask *cpu_mask, > > unsigned long start, > > unsigned long size, > > unsigned long asid) > > { > > return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID, > > - hart_mask, start, size, asid, 0); > > + cpu_mask, start, size, asid, 0); > > } > > EXPORT_SYMBOL(sbi_remote_hfence_vvma_asid); > > > > @@ -591,11 +618,7 @@ long sbi_get_mimpid(void) > > > > static void sbi_send_cpumask_ipi(const struct cpumask *target) > > { > > - struct cpumask hartid_mask; > > - > > - riscv_cpuid_to_hartid_mask(target, &hartid_mask); > > - > > - sbi_send_ipi(cpumask_bits(&hartid_mask)); > > + sbi_send_ipi(target); > > } > > > > static const struct riscv_ipi_ops sbi_ipi_ops = { > > diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c > > index 63241abe84eb..b42bfdc67482 100644 > > --- a/arch/riscv/kernel/setup.c > > +++ b/arch/riscv/kernel/setup.c > > @@ -59,16 +59,6 @@ atomic_t hart_lottery __section(".sdata") > > unsigned long boot_cpu_hartid; > > static DEFINE_PER_CPU(struct cpu, cpu_devices); > > > > -void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out) > > -{ > > - int cpu; > > - > > - cpumask_clear(out); > > - for_each_cpu(cpu, in) > > - cpumask_set_cpu(cpuid_to_hartid_map(cpu), out); > > -} > > -EXPORT_SYMBOL_GPL(riscv_cpuid_to_hartid_mask); > > - > > /* > > * Place kernel memory regions on the resource tree so that > > * kexec-tools can retrieve them from /proc/iomem. While there > > diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c > > index bd82375db51a..622f226454d5 100644 > > --- a/arch/riscv/kernel/smpboot.c > > +++ b/arch/riscv/kernel/smpboot.c > > @@ -96,7 +96,7 @@ void __init setup_smp(void) > > if (cpuid >= NR_CPUS) { > > pr_warn("Invalid cpuid [%d] for hartid [%d]\n", > > cpuid, hart); > > - break; > > + continue; > > } > > > > cpuid_to_hartid_map(cpuid) = hart; > > diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c > > index 9af67dbdc66a..f80a34fbf102 100644 > > --- a/arch/riscv/kvm/mmu.c > > +++ b/arch/riscv/kvm/mmu.c > > @@ -114,7 +114,6 @@ static bool stage2_get_leaf_entry(struct kvm *kvm, gpa_t addr, > > > > static void stage2_remote_tlb_flush(struct kvm *kvm, u32 level, gpa_t addr) > > { > > - struct cpumask hmask; > > unsigned long size = PAGE_SIZE; > > struct kvm_vmid *vmid = &kvm->arch.vmid; > > > > @@ -127,8 +126,7 @@ static void stage2_remote_tlb_flush(struct kvm *kvm, u32 level, gpa_t addr) > > * where the Guest/VM is running. > > */ > > preempt_disable(); > > - riscv_cpuid_to_hartid_mask(cpu_online_mask, &hmask); > > - sbi_remote_hfence_gvma_vmid(cpumask_bits(&hmask), addr, size, > > + sbi_remote_hfence_gvma_vmid(cpu_online_mask, addr, size, > > READ_ONCE(vmid->vmid)); > > preempt_enable(); > > } > > diff --git a/arch/riscv/kvm/vcpu_sbi_replace.c b/arch/riscv/kvm/vcpu_sbi_replace.c > > index 00036b7f83b9..1bc0608a5bfd 100644 > > --- a/arch/riscv/kvm/vcpu_sbi_replace.c > > +++ b/arch/riscv/kvm/vcpu_sbi_replace.c > > @@ -82,7 +82,7 @@ static int kvm_sbi_ext_rfence_handler(struct kvm_vcpu *vcpu, struct kvm_run *run > > { > > int ret = 0; > > unsigned long i; > > - struct cpumask cm, hm; > > + struct cpumask cm; > > struct kvm_vcpu *tmp; > > struct kvm_cpu_context *cp = &vcpu->arch.guest_context; > > unsigned long hmask = cp->a0; > > @@ -90,7 +90,6 @@ static int kvm_sbi_ext_rfence_handler(struct kvm_vcpu *vcpu, struct kvm_run *run > > unsigned long funcid = cp->a6; > > > > cpumask_clear(&cm); > > - cpumask_clear(&hm); > > kvm_for_each_vcpu(i, tmp, vcpu->kvm) { > > if (hbase != -1UL) { > > if (tmp->vcpu_id < hbase) > > @@ -103,17 +102,15 @@ static int kvm_sbi_ext_rfence_handler(struct kvm_vcpu *vcpu, struct kvm_run *run > > cpumask_set_cpu(tmp->cpu, &cm); > > } > > > > - riscv_cpuid_to_hartid_mask(&cm, &hm); > > - > > switch (funcid) { > > case SBI_EXT_RFENCE_REMOTE_FENCE_I: > > - ret = sbi_remote_fence_i(cpumask_bits(&hm)); > > + ret = sbi_remote_fence_i(&cm); > > break; > > case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA: > > - ret = sbi_remote_hfence_vvma(cpumask_bits(&hm), cp->a2, cp->a3); > > + ret = sbi_remote_hfence_vvma(&cm, cp->a2, cp->a3); > > break; > > case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID: > > - ret = sbi_remote_hfence_vvma_asid(cpumask_bits(&hm), cp->a2, > > + ret = sbi_remote_hfence_vvma_asid(&cm, cp->a2, > > cp->a3, cp->a4); > > break; > > case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA: > > diff --git a/arch/riscv/kvm/vcpu_sbi_v01.c b/arch/riscv/kvm/vcpu_sbi_v01.c > > index 4c7e13ec9ccc..07e2de14433a 100644 > > --- a/arch/riscv/kvm/vcpu_sbi_v01.c > > +++ b/arch/riscv/kvm/vcpu_sbi_v01.c > > @@ -38,7 +38,7 @@ static int kvm_sbi_ext_v01_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, > > int i, ret = 0; > > u64 next_cycle; > > struct kvm_vcpu *rvcpu; > > - struct cpumask cm, hm; > > + struct cpumask cm; > > struct kvm *kvm = vcpu->kvm; > > struct kvm_cpu_context *cp = &vcpu->arch.guest_context; > > > > @@ -101,15 +101,12 @@ static int kvm_sbi_ext_v01_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, > > continue; > > cpumask_set_cpu(rvcpu->cpu, &cm); > > } > > - riscv_cpuid_to_hartid_mask(&cm, &hm); > > if (cp->a7 == SBI_EXT_0_1_REMOTE_FENCE_I) > > - ret = sbi_remote_fence_i(cpumask_bits(&hm)); > > + ret = sbi_remote_fence_i(&cm); > > else if (cp->a7 == SBI_EXT_0_1_REMOTE_SFENCE_VMA) > > - ret = sbi_remote_hfence_vvma(cpumask_bits(&hm), > > - cp->a1, cp->a2); > > + ret = sbi_remote_hfence_vvma(&cm, cp->a1, cp->a2); > > else > > - ret = sbi_remote_hfence_vvma_asid(cpumask_bits(&hm), > > - cp->a1, cp->a2, cp->a3); > > + ret = sbi_remote_hfence_vvma_asid(&cm, cp->a1, cp->a2, cp->a3); > > break; > > default: > > ret = -EINVAL; > > diff --git a/arch/riscv/kvm/vmid.c b/arch/riscv/kvm/vmid.c > > index 807228f8f409..2fa4f7b1813d 100644 > > --- a/arch/riscv/kvm/vmid.c > > +++ b/arch/riscv/kvm/vmid.c > > @@ -67,7 +67,6 @@ void kvm_riscv_stage2_vmid_update(struct kvm_vcpu *vcpu) > > { > > unsigned long i; > > struct kvm_vcpu *v; > > - struct cpumask hmask; > > struct kvm_vmid *vmid = &vcpu->kvm->arch.vmid; > > > > if (!kvm_riscv_stage2_vmid_ver_changed(vmid)) > > @@ -102,8 +101,7 @@ void kvm_riscv_stage2_vmid_update(struct kvm_vcpu *vcpu) > > * running, we force VM exits on all host CPUs using IPI and > > * flush all Guest TLBs. > > */ > > - riscv_cpuid_to_hartid_mask(cpu_online_mask, &hmask); > > - sbi_remote_hfence_gvma(cpumask_bits(&hmask), 0, 0); > > + sbi_remote_hfence_gvma(cpu_online_mask, 0, 0); > > } > > > > vmid->vmid = vmid_next; > > diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c > > index 89f81067e09e..6cb7d96ad9c7 100644 > > --- a/arch/riscv/mm/cacheflush.c > > +++ b/arch/riscv/mm/cacheflush.c > > @@ -67,10 +67,7 @@ void flush_icache_mm(struct mm_struct *mm, bool local) > > */ > > smp_mb(); > > } else if (IS_ENABLED(CONFIG_RISCV_SBI)) { > > - cpumask_t hartid_mask; > > - > > - riscv_cpuid_to_hartid_mask(&others, &hartid_mask); > > - sbi_remote_fence_i(cpumask_bits(&hartid_mask)); > > + sbi_remote_fence_i(&others); > > } else { > > on_each_cpu_mask(&others, ipi_remote_fence_i, NULL, 1); > > } > > diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c > > index 64f8201237c2..37ed760d007c 100644 > > --- a/arch/riscv/mm/tlbflush.c > > +++ b/arch/riscv/mm/tlbflush.c > > @@ -32,7 +32,6 @@ static void __sbi_tlb_flush_range(struct mm_struct *mm, unsigned long start, > > unsigned long size, unsigned long stride) > > { > > struct cpumask *cmask = mm_cpumask(mm); > > - struct cpumask hmask; > > unsigned int cpuid; > > bool broadcast; > > > > @@ -46,9 +45,7 @@ static void __sbi_tlb_flush_range(struct mm_struct *mm, unsigned long start, > > unsigned long asid = atomic_long_read(&mm->context.id); > > > > if (broadcast) { > > - riscv_cpuid_to_hartid_mask(cmask, &hmask); > > - sbi_remote_sfence_vma_asid(cpumask_bits(&hmask), > > - start, size, asid); > > + sbi_remote_sfence_vma_asid(cmask, start, size, asid); > > } else if (size <= stride) { > > local_flush_tlb_page_asid(start, asid); > > } else { > > @@ -56,9 +53,7 @@ static void __sbi_tlb_flush_range(struct mm_struct *mm, unsigned long start, > > } > > } else { > > if (broadcast) { > > - riscv_cpuid_to_hartid_mask(cmask, &hmask); > > - sbi_remote_sfence_vma(cpumask_bits(&hmask), > > - start, size); > > + sbi_remote_sfence_vma(cmask, start, size); > > } else if (size <= stride) { > > local_flush_tlb_page(start); > > } else { > > -- > > 2.30.2 > > > > > > _______________________________________________ > > linux-riscv mailing list > > linux-riscv@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-riscv >
Hi Atish, On Wed, Jan 26, 2022 at 3:21 AM Atish Patra <atishp@atishpatra.org> wrote: > On Tue, Jan 25, 2022 at 2:26 PM Jessica Clarke <jrtc27@jrtc27.com> wrote: > > On 20 Jan 2022, at 09:09, Atish Patra <atishp@rivosinc.com> wrote: > > > Currently, SBI APIs accept a hartmask that is generated from struct > > > cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it > > > is not the correct data structure for hartids as it can be higher > > > than NR_CPUs for platforms with sparse or discontguous hartids. > > > > > > Remove all association between hartid mask and struct cpumask. > > > > > > Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes) > > > Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes) > > > Signed-off-by: Atish Patra <atishp@rivosinc.com> > I am yet to reproduce it on my end. > @Geert Uytterhoeven: can you please try the below diff on your end. Unfortunately it doesn't fix the issue for me. /me debugging... Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi Atish, On Wed, Jan 26, 2022 at 9:28 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > On Wed, Jan 26, 2022 at 3:21 AM Atish Patra <atishp@atishpatra.org> wrote: > > On Tue, Jan 25, 2022 at 2:26 PM Jessica Clarke <jrtc27@jrtc27.com> wrote: > > > On 20 Jan 2022, at 09:09, Atish Patra <atishp@rivosinc.com> wrote: > > > > Currently, SBI APIs accept a hartmask that is generated from struct > > > > cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it > > > > is not the correct data structure for hartids as it can be higher > > > > than NR_CPUs for platforms with sparse or discontguous hartids. > > > > > > > > Remove all association between hartid mask and struct cpumask. > > > > > > > > Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes) > > > > Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes) > > > > Signed-off-by: Atish Patra <atishp@rivosinc.com> > > > I am yet to reproduce it on my end. > > @Geert Uytterhoeven: can you please try the below diff on your end. > > Unfortunately it doesn't fix the issue for me. > > /me debugging... Found it: after this commit, the SBI_EXT_RFENCE_REMOTE_FENCE_I and SBI_EXT_RFENCE_REMOTE_SFENCE_VMA ecalls are now called with hmask = 0x8000000000000001 and hbase = 1 instead of hmask = 3 and hbase = 0. cpuid 1 maps to hartid 0 cpuid 0 maps to hartid 1 __sbi_rfence_v02:364: cpuid 1 hartid 0 __sbi_rfence_v02:377: hartid 0 hbase 1 hmask |= 1UL << (hartid - hbase); oops __sbi_rfence_v02_call:303: SBI_EXT_RFENCE_REMOTE_FENCE_I hmask 8000000000000001 hbase 1 Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On Wed, Jan 26, 2022 at 1:10 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > Hi Atish, > > On Wed, Jan 26, 2022 at 9:28 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > On Wed, Jan 26, 2022 at 3:21 AM Atish Patra <atishp@atishpatra.org> wrote: > > > On Tue, Jan 25, 2022 at 2:26 PM Jessica Clarke <jrtc27@jrtc27.com> wrote: > > > > On 20 Jan 2022, at 09:09, Atish Patra <atishp@rivosinc.com> wrote: > > > > > Currently, SBI APIs accept a hartmask that is generated from struct > > > > > cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it > > > > > is not the correct data structure for hartids as it can be higher > > > > > than NR_CPUs for platforms with sparse or discontguous hartids. > > > > > > > > > > Remove all association between hartid mask and struct cpumask. > > > > > > > > > > Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes) > > > > > Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes) > > > > > Signed-off-by: Atish Patra <atishp@rivosinc.com> > > > > > I am yet to reproduce it on my end. > > > @Geert Uytterhoeven: can you please try the below diff on your end. > > > > Unfortunately it doesn't fix the issue for me. > > > > /me debugging... > > Found it: after this commit, the SBI_EXT_RFENCE_REMOTE_FENCE_I and > SBI_EXT_RFENCE_REMOTE_SFENCE_VMA ecalls are now called with > hmask = 0x8000000000000001 and hbase = 1 instead of hmask = 3 and > hbase = 0. > > cpuid 1 maps to hartid 0 > cpuid 0 maps to hartid 1 > > __sbi_rfence_v02:364: cpuid 1 hartid 0 > __sbi_rfence_v02:377: hartid 0 hbase 1 > hmask |= 1UL << (hartid - hbase); > > oops > > __sbi_rfence_v02_call:303: SBI_EXT_RFENCE_REMOTE_FENCE_I hmask > 8000000000000001 hbase 1 > Ahh yes. hmask will be incorrect if the bootcpu(cpu 0) is a higher hartid and it is trying to do a remote tlb flush/IPI to lower the hartid. We should generate the hartid array before the loop. Can you try this diff ? It seems to work for me during multiple boot cycle on the unleashed. You can find the patch here as well https://github.com/atishp04/linux/commits/v5.17-rc1 -------------------------------------------------------------------------------------------------------------------------------- diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c index f72527fcb347..4ebeb5813edc 100644 --- a/arch/riscv/kernel/sbi.c +++ b/arch/riscv/kernel/sbi.c @@ -8,6 +8,8 @@ #include <linux/init.h> #include <linux/pm.h> #include <linux/reboot.h> +#include <linux/sort.h> + #include <asm/sbi.h> #include <asm/smp.h> @@ -85,7 +87,7 @@ static unsigned long __sbi_v01_cpumask_to_hartmask(const struct cpumask *cpu_mas pr_warn("Unable to send any request to hartid > BITS_PER_LONG for SBI v0.1\n"); break; } - hmask |= 1 << hartid; + hmask |= 1UL << hartid; } return hmask; @@ -160,7 +162,7 @@ static int __sbi_send_ipi_v01(const struct cpumask *cpu_mask) { unsigned long hart_mask; - if (!cpu_mask) + if (!cpu_mask || cpumask_empty(cpu_mask)) cpu_mask = cpu_online_mask; hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask); @@ -176,7 +178,7 @@ static int __sbi_rfence_v01(int fid, const struct cpumask *cpu_mask, int result = 0; unsigned long hart_mask; - if (!cpu_mask) + if (!cpu_mask || cpumask_empty(cpu_mask)) cpu_mask = cpu_online_mask; hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask); @@ -236,6 +238,18 @@ static int __sbi_rfence_v01(int fid, const struct cpumask *cpu_mask, static void sbi_set_power_off(void) {} #endif /* CONFIG_RISCV_SBI_V01 */ +static int cmp_ulong(const void *A, const void *B) +{ + const unsigned long *a = A, *b = B; + + if (*a < *b) + return -1; + else if (*a > *b) + return 1; + else + return 0; +} + static void __sbi_set_timer_v02(uint64_t stime_value) { #if __riscv_xlen == 32 @@ -251,13 +265,22 @@ static int __sbi_send_ipi_v02(const struct cpumask *cpu_mask) { unsigned long hartid, cpuid, hmask = 0, hbase = 0; struct sbiret ret = {0}; - int result; + int result, index = 0, max_index = 0; + unsigned long hartid_arr[NR_CPUS] = {0}; - if (!cpu_mask) + if (!cpu_mask || cpumask_empty(cpu_mask)) cpu_mask = cpu_online_mask; for_each_cpu(cpuid, cpu_mask) { hartid = cpuid_to_hartid_map(cpuid); + hartid_arr[index] = hartid; + index++; + } + + max_index = index; + sort(hartid_arr, max_index, sizeof(unsigned long), cmp_ulong, NULL); + for (index = 0; index < max_index; index++) { + hartid = hartid_arr[index]; if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) { ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, hmask, hbase, 0, 0, 0, 0); @@ -345,13 +368,21 @@ static int __sbi_rfence_v02(int fid, const struct cpumask *cpu_mask, unsigned long arg4, unsigned long arg5) { unsigned long hartid, cpuid, hmask = 0, hbase = 0; - int result; + int result, index = 0, max_index = 0; + unsigned long hartid_arr[NR_CPUS] = {0}; - if (!cpu_mask) + if (!cpu_mask || cpumask_empty(cpu_mask)) cpu_mask = cpu_online_mask; for_each_cpu(cpuid, cpu_mask) { hartid = cpuid_to_hartid_map(cpuid); + hartid_arr[index] = hartid; + index++; + } + max_index = index; + sort(hartid_arr, max_index, sizeof(unsigned long), cmp_ulong, NULL); + for (index = 0; index < max_index; index++) { + hartid = hartid_arr[index]; if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) { result = __sbi_rfence_v02_call(fid, hmask, hbase, start, size, arg4, arg5); -------------------------------------------------------------------------------------------------------------------------------- > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
Hi Atish, On Thu, Jan 27, 2022 at 2:02 AM Atish Patra <atishp@atishpatra.org> wrote: > On Wed, Jan 26, 2022 at 1:10 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > On Wed, Jan 26, 2022 at 9:28 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > > On Wed, Jan 26, 2022 at 3:21 AM Atish Patra <atishp@atishpatra.org> wrote: > > > > On Tue, Jan 25, 2022 at 2:26 PM Jessica Clarke <jrtc27@jrtc27.com> wrote: > > > > > On 20 Jan 2022, at 09:09, Atish Patra <atishp@rivosinc.com> wrote: > > > > > > Currently, SBI APIs accept a hartmask that is generated from struct > > > > > > cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it > > > > > > is not the correct data structure for hartids as it can be higher > > > > > > than NR_CPUs for platforms with sparse or discontguous hartids. > > > > > > > > > > > > Remove all association between hartid mask and struct cpumask. > > > > > > > > > > > > Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes) > > > > > > Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes) > > > > > > Signed-off-by: Atish Patra <atishp@rivosinc.com> > > > > > > > I am yet to reproduce it on my end. > > > > @Geert Uytterhoeven: can you please try the below diff on your end. > > > > > > Unfortunately it doesn't fix the issue for me. > > > > > > /me debugging... > > > > Found it: after this commit, the SBI_EXT_RFENCE_REMOTE_FENCE_I and > > SBI_EXT_RFENCE_REMOTE_SFENCE_VMA ecalls are now called with > > hmask = 0x8000000000000001 and hbase = 1 instead of hmask = 3 and > > hbase = 0. > > > > cpuid 1 maps to hartid 0 > > cpuid 0 maps to hartid 1 > > > > __sbi_rfence_v02:364: cpuid 1 hartid 0 > > __sbi_rfence_v02:377: hartid 0 hbase 1 > > hmask |= 1UL << (hartid - hbase); > > > > oops > > > > __sbi_rfence_v02_call:303: SBI_EXT_RFENCE_REMOTE_FENCE_I hmask > > 8000000000000001 hbase 1 > > > > Ahh yes. hmask will be incorrect if the bootcpu(cpu 0) is a higher > hartid and it is trying to do a remote tlb flush/IPI > to lower the hartid. We should generate the hartid array before the loop. > > Can you try this diff ? It seems to work for me during multiple boot > cycle on the unleashed. > > You can find the patch here as well > https://github.com/atishp04/linux/commits/v5.17-rc1 Thanks, that fixes the issue for me. > --- a/arch/riscv/kernel/sbi.c > +++ b/arch/riscv/kernel/sbi.c > @@ -8,6 +8,8 @@ > #include <linux/init.h> > #include <linux/pm.h> > #include <linux/reboot.h> > +#include <linux/sort.h> > + > #include <asm/sbi.h> > #include <asm/smp.h> > > @@ -85,7 +87,7 @@ static unsigned long > __sbi_v01_cpumask_to_hartmask(const struct cpumask *cpu_mas > pr_warn("Unable to send any request to hartid > BITS_PER_LONG for > SBI v0.1\n"); > break; > } > - hmask |= 1 << hartid; > + hmask |= 1UL << hartid; > } > > return hmask; > @@ -160,7 +162,7 @@ static int __sbi_send_ipi_v01(const struct cpumask > *cpu_mask) > { > unsigned long hart_mask; > > - if (!cpu_mask) > + if (!cpu_mask || cpumask_empty(cpu_mask)) > cpu_mask = cpu_online_mask; > hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask); > > @@ -176,7 +178,7 @@ static int __sbi_rfence_v01(int fid, const struct > cpumask *cpu_mask, > int result = 0; > unsigned long hart_mask; > > - if (!cpu_mask) > + if (!cpu_mask || cpumask_empty(cpu_mask)) > cpu_mask = cpu_online_mask; > hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask); > > @@ -236,6 +238,18 @@ static int __sbi_rfence_v01(int fid, const struct > cpumask *cpu_mask, > static void sbi_set_power_off(void) {} > #endif /* CONFIG_RISCV_SBI_V01 */ > > +static int cmp_ulong(const void *A, const void *B) > +{ > + const unsigned long *a = A, *b = B; > + > + if (*a < *b) > + return -1; > + else if (*a > *b) > + return 1; > + else > + return 0; > +} > + > static void __sbi_set_timer_v02(uint64_t stime_value) > { > #if __riscv_xlen == 32 > @@ -251,13 +265,22 @@ static int __sbi_send_ipi_v02(const struct > cpumask *cpu_mask) > { > unsigned long hartid, cpuid, hmask = 0, hbase = 0; > struct sbiret ret = {0}; > - int result; > + int result, index = 0, max_index = 0; > + unsigned long hartid_arr[NR_CPUS] = {0}; > > - if (!cpu_mask) > + if (!cpu_mask || cpumask_empty(cpu_mask)) > cpu_mask = cpu_online_mask; > > for_each_cpu(cpuid, cpu_mask) { > hartid = cpuid_to_hartid_map(cpuid); > + hartid_arr[index] = hartid; > + index++; > + } > + > + max_index = index; > + sort(hartid_arr, max_index, sizeof(unsigned long), cmp_ulong, NULL); > + for (index = 0; index < max_index; index++) { > + hartid = hartid_arr[index]; > if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) { > ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, > hmask, hbase, 0, 0, 0, 0); > @@ -345,13 +368,21 @@ static int __sbi_rfence_v02(int fid, const > struct cpumask *cpu_mask, > unsigned long arg4, unsigned long arg5) > { > unsigned long hartid, cpuid, hmask = 0, hbase = 0; > - int result; > + int result, index = 0, max_index = 0; > + unsigned long hartid_arr[NR_CPUS] = {0}; That's up to 256 bytes on the stack. And more if the maximum number of cores is increased. > > - if (!cpu_mask) > + if (!cpu_mask || cpumask_empty(cpu_mask)) > cpu_mask = cpu_online_mask; > > for_each_cpu(cpuid, cpu_mask) { > hartid = cpuid_to_hartid_map(cpuid); > + hartid_arr[index] = hartid; > + index++; > + } > + max_index = index; > + sort(hartid_arr, max_index, sizeof(unsigned long), cmp_ulong, NULL); > + for (index = 0; index < max_index; index++) { > + hartid = hartid_arr[index]; That looks expensive to me. What about shifting hmask and adjusting hbase if a hartid is lower than the current hbase? > if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) { > result = __sbi_rfence_v02_call(fid, hmask, hbase, > start, size, arg4, arg5); Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On Thu, Jan 27, 2022 at 9:48 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > On Thu, Jan 27, 2022 at 2:02 AM Atish Patra <atishp@atishpatra.org> wrote: > > On Wed, Jan 26, 2022 at 1:10 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > > On Wed, Jan 26, 2022 at 9:28 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > > > On Wed, Jan 26, 2022 at 3:21 AM Atish Patra <atishp@atishpatra.org> wrote: > > > > > On Tue, Jan 25, 2022 at 2:26 PM Jessica Clarke <jrtc27@jrtc27.com> wrote: > > > > > > On 20 Jan 2022, at 09:09, Atish Patra <atishp@rivosinc.com> wrote: > > > > > > > Currently, SBI APIs accept a hartmask that is generated from struct > > > > > > > cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it > > > > > > > is not the correct data structure for hartids as it can be higher > > > > > > > than NR_CPUs for platforms with sparse or discontguous hartids. > > > > > > > > > > > > > > Remove all association between hartid mask and struct cpumask. > > > > > > > > > > > > > > Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes) > > > > > > > Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes) > > > > > > > Signed-off-by: Atish Patra <atishp@rivosinc.com> > > > > > > > > > I am yet to reproduce it on my end. > > > > > @Geert Uytterhoeven: can you please try the below diff on your end. > > > > > > > > Unfortunately it doesn't fix the issue for me. > > > > > > > > /me debugging... > > > > > > Found it: after this commit, the SBI_EXT_RFENCE_REMOTE_FENCE_I and > > > SBI_EXT_RFENCE_REMOTE_SFENCE_VMA ecalls are now called with > > > hmask = 0x8000000000000001 and hbase = 1 instead of hmask = 3 and > > > hbase = 0. > > > > > > cpuid 1 maps to hartid 0 > > > cpuid 0 maps to hartid 1 > > > > > > __sbi_rfence_v02:364: cpuid 1 hartid 0 > > > __sbi_rfence_v02:377: hartid 0 hbase 1 > > > hmask |= 1UL << (hartid - hbase); > > > > > > oops > > > > > > __sbi_rfence_v02_call:303: SBI_EXT_RFENCE_REMOTE_FENCE_I hmask > > > 8000000000000001 hbase 1 > > > > > > > Ahh yes. hmask will be incorrect if the bootcpu(cpu 0) is a higher > > hartid and it is trying to do a remote tlb flush/IPI > > to lower the hartid. We should generate the hartid array before the loop. > > > > Can you try this diff ? It seems to work for me during multiple boot > > cycle on the unleashed. > > > > You can find the patch here as well > > https://github.com/atishp04/linux/commits/v5.17-rc1 > > Thanks, that fixes the issue for me. Tested-by: Geert Uytterhoeven <geert@linux-m68k.org> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On 1/26/22 17:01, Atish Patra wrote: > On Wed, Jan 26, 2022 at 1:10 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: >> Hi Atish, >> >> On Wed, Jan 26, 2022 at 9:28 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: >>> On Wed, Jan 26, 2022 at 3:21 AM Atish Patra <atishp@atishpatra.org> wrote: >>>> On Tue, Jan 25, 2022 at 2:26 PM Jessica Clarke <jrtc27@jrtc27.com> wrote: >>>>> On 20 Jan 2022, at 09:09, Atish Patra <atishp@rivosinc.com> wrote: >>>>>> Currently, SBI APIs accept a hartmask that is generated from struct >>>>>> cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it >>>>>> is not the correct data structure for hartids as it can be higher >>>>>> than NR_CPUs for platforms with sparse or discontguous hartids. >>>>>> >>>>>> Remove all association between hartid mask and struct cpumask. >>>>>> >>>>>> Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes) >>>>>> Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes) >>>>>> Signed-off-by: Atish Patra <atishp@rivosinc.com> >>>> I am yet to reproduce it on my end. >>>> @Geert Uytterhoeven: can you please try the below diff on your end. >>> Unfortunately it doesn't fix the issue for me. >>> >>> /me debugging... >> Found it: after this commit, the SBI_EXT_RFENCE_REMOTE_FENCE_I and >> SBI_EXT_RFENCE_REMOTE_SFENCE_VMA ecalls are now called with >> hmask = 0x8000000000000001 and hbase = 1 instead of hmask = 3 and >> hbase = 0. >> >> cpuid 1 maps to hartid 0 >> cpuid 0 maps to hartid 1 >> >> __sbi_rfence_v02:364: cpuid 1 hartid 0 >> __sbi_rfence_v02:377: hartid 0 hbase 1 >> hmask |= 1UL << (hartid - hbase); >> >> oops >> >> __sbi_rfence_v02_call:303: SBI_EXT_RFENCE_REMOTE_FENCE_I hmask >> 8000000000000001 hbase 1 >> > Ahh yes. hmask will be incorrect if the bootcpu(cpu 0) is a higher > hartid and it is trying to do a remote tlb flush/IPI > to lower the hartid. We should generate the hartid array before the loop. > > Can you try this diff ? It seems to work for me during multiple boot > cycle on the unleashed. > > You can find the patch here as well > https://github.com/atishp04/linux/commits/v5.17-rc1 > > -------------------------------------------------------------------------------------------------------------------------------- > diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c > index f72527fcb347..4ebeb5813edc 100644 > --- a/arch/riscv/kernel/sbi.c > +++ b/arch/riscv/kernel/sbi.c > @@ -8,6 +8,8 @@ > #include <linux/init.h> > #include <linux/pm.h> > #include <linux/reboot.h> > +#include <linux/sort.h> > + > #include <asm/sbi.h> > #include <asm/smp.h> > > @@ -85,7 +87,7 @@ static unsigned long > __sbi_v01_cpumask_to_hartmask(const struct cpumask *cpu_mas > pr_warn("Unable to send any request to hartid > BITS_PER_LONG for > SBI v0.1\n"); > break; > } > - hmask |= 1 << hartid; > + hmask |= 1UL << hartid; > } > > return hmask; > @@ -160,7 +162,7 @@ static int __sbi_send_ipi_v01(const struct cpumask > *cpu_mask) > { > unsigned long hart_mask; > > - if (!cpu_mask) > + if (!cpu_mask || cpumask_empty(cpu_mask)) > cpu_mask = cpu_online_mask; > hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask); > > @@ -176,7 +178,7 @@ static int __sbi_rfence_v01(int fid, const struct > cpumask *cpu_mask, > int result = 0; > unsigned long hart_mask; > > - if (!cpu_mask) > + if (!cpu_mask || cpumask_empty(cpu_mask)) > cpu_mask = cpu_online_mask; > hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask); > > @@ -236,6 +238,18 @@ static int __sbi_rfence_v01(int fid, const struct > cpumask *cpu_mask, > static void sbi_set_power_off(void) {} > #endif /* CONFIG_RISCV_SBI_V01 */ > > +static int cmp_ulong(const void *A, const void *B) > +{ > + const unsigned long *a = A, *b = B; > + > + if (*a < *b) > + return -1; > + else if (*a > *b) > + return 1; > + else > + return 0; > +} > + > static void __sbi_set_timer_v02(uint64_t stime_value) > { > #if __riscv_xlen == 32 > @@ -251,13 +265,22 @@ static int __sbi_send_ipi_v02(const struct > cpumask *cpu_mask) > { > unsigned long hartid, cpuid, hmask = 0, hbase = 0; > struct sbiret ret = {0}; > - int result; > + int result, index = 0, max_index = 0; > + unsigned long hartid_arr[NR_CPUS] = {0}; > > - if (!cpu_mask) > + if (!cpu_mask || cpumask_empty(cpu_mask)) > cpu_mask = cpu_online_mask; > > for_each_cpu(cpuid, cpu_mask) { > hartid = cpuid_to_hartid_map(cpuid); > + hartid_arr[index] = hartid; > + index++; > + } > + > + max_index = index; > + sort(hartid_arr, max_index, sizeof(unsigned long), cmp_ulong, NULL); > + for (index = 0; index < max_index; index++) { > + hartid = hartid_arr[index]; > if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) { > ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, > hmask, hbase, 0, 0, 0, 0); > @@ -345,13 +368,21 @@ static int __sbi_rfence_v02(int fid, const > struct cpumask *cpu_mask, > unsigned long arg4, unsigned long arg5) > { > unsigned long hartid, cpuid, hmask = 0, hbase = 0; > - int result; > + int result, index = 0, max_index = 0; > + unsigned long hartid_arr[NR_CPUS] = {0}; > > - if (!cpu_mask) > + if (!cpu_mask || cpumask_empty(cpu_mask)) > cpu_mask = cpu_online_mask; > > for_each_cpu(cpuid, cpu_mask) { > hartid = cpuid_to_hartid_map(cpuid); > + hartid_arr[index] = hartid; > + index++; > + } > + max_index = index; > + sort(hartid_arr, max_index, sizeof(unsigned long), cmp_ulong, NULL); > + for (index = 0; index < max_index; index++) { > + hartid = hartid_arr[index]; > if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) { > result = __sbi_rfence_v02_call(fid, hmask, hbase, > start, size, arg4, arg5); > > -------------------------------------------------------------------------------------------------------------------------------- Works good here. No systemd segfaults on Unmatched. Tested-by: Ron Economos <re@w6rz.net>
Hi Atish, On Thu, Jan 27, 2022 at 9:48 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > On Thu, Jan 27, 2022 at 2:02 AM Atish Patra <atishp@atishpatra.org> wrote: > Ahh yes. hmask will be incorrect if the bootcpu(cpu 0) is a higher > > hartid and it is trying to do a remote tlb flush/IPI > > to lower the hartid. We should generate the hartid array before the loop. > > > > Can you try this diff ? It seems to work for me during multiple boot > > cycle on the unleashed. > > > > You can find the patch here as well > > https://github.com/atishp04/linux/commits/v5.17-rc1 > > Thanks, that fixes the issue for me. > > > --- a/arch/riscv/kernel/sbi.c > > +++ b/arch/riscv/kernel/sbi.c > > @@ -345,13 +368,21 @@ static int __sbi_rfence_v02(int fid, const > > struct cpumask *cpu_mask, > > unsigned long arg4, unsigned long arg5) > > { > > unsigned long hartid, cpuid, hmask = 0, hbase = 0; > > - int result; > > + int result, index = 0, max_index = 0; > > + unsigned long hartid_arr[NR_CPUS] = {0}; > > That's up to 256 bytes on the stack. And more if the maximum > number of cores is increased. I.e. 4 KiB with the proposed increase to 256 CPUs, as mentioned in https://lore.kernel.org/all/CAAhSdy2xTW0FkwvS2dExOb7q1dVruFfTP_Vh_jWju+yi7thCeA@mail.gmail.com/ Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On Jan 27 2022, Geert Uytterhoeven wrote: > Hi Atish, > > On Thu, Jan 27, 2022 at 9:48 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: >> On Thu, Jan 27, 2022 at 2:02 AM Atish Patra <atishp@atishpatra.org> wrote: > > Ahh yes. hmask will be incorrect if the bootcpu(cpu 0) is a higher >> > hartid and it is trying to do a remote tlb flush/IPI >> > to lower the hartid. We should generate the hartid array before the loop. >> > >> > Can you try this diff ? It seems to work for me during multiple boot >> > cycle on the unleashed. >> > >> > You can find the patch here as well >> > https://github.com/atishp04/linux/commits/v5.17-rc1 >> >> Thanks, that fixes the issue for me. >> >> > --- a/arch/riscv/kernel/sbi.c >> > +++ b/arch/riscv/kernel/sbi.c > >> > @@ -345,13 +368,21 @@ static int __sbi_rfence_v02(int fid, const >> > struct cpumask *cpu_mask, >> > unsigned long arg4, unsigned long arg5) >> > { >> > unsigned long hartid, cpuid, hmask = 0, hbase = 0; >> > - int result; >> > + int result, index = 0, max_index = 0; >> > + unsigned long hartid_arr[NR_CPUS] = {0}; >> >> That's up to 256 bytes on the stack. And more if the maximum >> number of cores is increased. > > I.e. 4 KiB with the proposed increase to 256 CPUs, as mentioned in And those 4K need to be cleared each time the function is called, even if there is only a small number of cpus.
Hi Atish, On Fri, Jan 28, 2022 at 1:13 AM Atish Patra <atishp@atishpatra.org> wrote: > On Thu, Jan 27, 2022 at 12:48 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: >> On Thu, Jan 27, 2022 at 2:02 AM Atish Patra <atishp@atishpatra.org> wrote: >> > On Wed, Jan 26, 2022 at 1:10 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: >> > > On Wed, Jan 26, 2022 at 9:28 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: >> > > > On Wed, Jan 26, 2022 at 3:21 AM Atish Patra <atishp@atishpatra.org> wrote: >> > > > > On Tue, Jan 25, 2022 at 2:26 PM Jessica Clarke <jrtc27@jrtc27.com> wrote: >> > > > > > On 20 Jan 2022, at 09:09, Atish Patra <atishp@rivosinc.com> wrote: >> > > > > > > Currently, SBI APIs accept a hartmask that is generated from struct >> > > > > > > cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it >> > > > > > > is not the correct data structure for hartids as it can be higher >> > > > > > > than NR_CPUs for platforms with sparse or discontguous hartids. >> > > > > > > >> > > > > > > Remove all association between hartid mask and struct cpumask. >> > > > > > > >> > > > > > > Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes) >> > > > > > > Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes) >> > > > > > > Signed-off-by: Atish Patra <atishp@rivosinc.com> >> > > > >> > > > > I am yet to reproduce it on my end. >> > > > > @Geert Uytterhoeven: can you please try the below diff on your end. >> > > > >> > > > Unfortunately it doesn't fix the issue for me. >> > > > >> > > > /me debugging... >> > > >> > > Found it: after this commit, the SBI_EXT_RFENCE_REMOTE_FENCE_I and >> > > SBI_EXT_RFENCE_REMOTE_SFENCE_VMA ecalls are now called with >> > > hmask = 0x8000000000000001 and hbase = 1 instead of hmask = 3 and >> > > hbase = 0. >> > > >> > > cpuid 1 maps to hartid 0 >> > > cpuid 0 maps to hartid 1 >> > > >> > > __sbi_rfence_v02:364: cpuid 1 hartid 0 >> > > __sbi_rfence_v02:377: hartid 0 hbase 1 >> > > hmask |= 1UL << (hartid - hbase); >> > > >> > > oops >> > > >> > > __sbi_rfence_v02_call:303: SBI_EXT_RFENCE_REMOTE_FENCE_I hmask >> > > 8000000000000001 hbase 1 >> > > >> > >> > Ahh yes. hmask will be incorrect if the bootcpu(cpu 0) is a higher >> > hartid and it is trying to do a remote tlb flush/IPI >> > to lower the hartid. We should generate the hartid array before the loop. >> > >> > Can you try this diff ? It seems to work for me during multiple boot >> > cycle on the unleashed. >> > >> > You can find the patch here as well >> > https://github.com/atishp04/linux/commits/v5.17-rc1 >> > @@ -345,13 +368,21 @@ static int __sbi_rfence_v02(int fid, const >> > struct cpumask *cpu_mask, >> > unsigned long arg4, unsigned long arg5) >> > { >> > unsigned long hartid, cpuid, hmask = 0, hbase = 0; >> > - int result; >> > + int result, index = 0, max_index = 0; >> > + unsigned long hartid_arr[NR_CPUS] = {0}; >> >> That's up to 256 bytes on the stack. And more if the maximum >> number of cores is increased. >> > > Yeah. We can switch to dynamic allocation using kmalloc based on > the number of bits set in the cpumask. Even more overhead... >> > - if (!cpu_mask) >> > + if (!cpu_mask || cpumask_empty(cpu_mask)) >> > cpu_mask = cpu_online_mask; >> > >> > for_each_cpu(cpuid, cpu_mask) { >> > hartid = cpuid_to_hartid_map(cpuid); >> > + hartid_arr[index] = hartid; >> > + index++; >> > + } >> > + max_index = index; >> > + sort(hartid_arr, max_index, sizeof(unsigned long), cmp_ulong, NULL); >> > + for (index = 0; index < max_index; index++) { >> > + hartid = hartid_arr[index]; >> >> That looks expensive to me. >> >> What about shifting hmask and adjusting hbase if a hartid is >> lower than the current hbase? > > That will probably work for current systems but it will fail when we have hartid > 64. > The below logic as it assumes that the hartids are in order. We can have a situation > where a two consecutive cpuid belong to hartids that require two invocations of sbi call > because the number of harts exceeds BITS_PER_LONG. If the number of harts exceeds BITS_PER_LONG, you always need multiple calls, right? I think the below (gmail-whitespace-damaged diff) should work: --- a/arch/riscv/kernel/sbi.c +++ b/arch/riscv/kernel/sbi.c @@ -249,7 +249,7 @@ static void __sbi_set_timer_v02(uint64_t stime_value) static int __sbi_send_ipi_v02(const struct cpumask *cpu_mask) { - unsigned long hartid, cpuid, hmask = 0, hbase = 0; + unsigned long hartid, cpuid, hmask = 0, hbase = 0, htop = 0; struct sbiret ret = {0}; int result; @@ -258,16 +258,27 @@ static int __sbi_send_ipi_v02(const struct cpumask *cpu_mask) for_each_cpu(cpuid, cpu_mask) { hartid = cpuid_to_hartid_map(cpuid); - if (hmask && - (hartid < hbase || hartid >= hbase + BITS_PER_LONG)) { - ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, - hmask, hbase, 0, 0, 0, 0); - if (ret.error) - goto ecall_failed; - hmask = 0; + if (hmask) { + if (hartid + BITS_PER_LONG <= htop || + hartid >= hbase + BITS_PER_LONG) { + ret = sbi_ecall(SBI_EXT_IPI, + SBI_EXT_IPI_SEND_IPI, hmask, + hbase, 0, 0, 0, 0); + if (ret.error) + goto ecall_failed; + hmask = 0; + } else if (hartid < hbase) { + /* shift the mask to fit lower hartid */ + hmask <<= hbase - hartid; + hbase = hartid; + } } - if (!hmask) + if (!hmask) { hbase = hartid & -BITS_PER_LONG; + htop = hartid; + } else if (hartid > htop) { + htop = hartid; + } hmask |= 1UL << (hartid - hbase); } @@ -344,7 +355,7 @@ static int __sbi_rfence_v02(int fid, const struct cpumask *cpu_mask, unsigned long start, unsigned long size, unsigned long arg4, unsigned long arg5) { - unsigned long hartid, cpuid, hmask = 0, hbase = 0; + unsigned long hartid, cpuid, hmask = 0, hbase = 0, htop = 0; int result; if (!cpu_mask || cpumask_empty(cpu_mask)) @@ -352,16 +363,26 @@ static int __sbi_rfence_v02(int fid, const struct cpumask *cpu_mask, for_each_cpu(cpuid, cpu_mask) { hartid = cpuid_to_hartid_map(cpuid); - if (hmask && - (hartid < hbase || hartid >= hbase + BITS_PER_LONG)) { - result = __sbi_rfence_v02_call(fid, hmask, hbase, - start, size, arg4, arg5); - if (result) - return result; - hmask = 0; + if (hmask) { + if (hartid + BITS_PER_LONG <= htop || + hartid >= hbase + BITS_PER_LONG) { + result = __sbi_rfence_v02_call(fid, hmask, + hbase, start, size, arg4, arg5); + if (result) + return result; + hmask = 0; + } else if (hartid < hbase) { + /* shift the mask to fit lower hartid */ + hmask <<= hbase - hartid; + hbase = hartid; + } + } + if (!hmask) { + hbase = hartid; + htop = hartid; + } else if (hartid > htop) { + htop = hartid; } - if (!hmask) - hbase = hartid & -BITS_PER_LONG; hmask |= 1UL << (hartid - hbase); } Another simpler solution would be to just round hbase down to a multiple of 32/64 (gmail-whitespace-damaged diff): --- a/arch/riscv/kernel/sbi.c +++ b/arch/riscv/kernel/sbi.c @@ -258,16 +258,16 @@ static int __sbi_send_ipi_v02(const struct cpumask *cpu_mask) for_each_cpu(cpuid, cpu_mask) { hartid = cpuid_to_hartid_map(cpuid); - if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) { + if (hmask && + (hartid < hbase || hartid >= hbase + BITS_PER_LONG)) { ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, hmask, hbase, 0, 0, 0, 0); if (ret.error) goto ecall_failed; hmask = 0; - hbase = 0; } if (!hmask) - hbase = hartid; + hbase = hartid & -BITS_PER_LONG; hmask |= 1UL << (hartid - hbase); } @@ -352,16 +352,16 @@ static int __sbi_rfence_v02(int fid, const struct cpumask *cpu_mask, for_each_cpu(cpuid, cpu_mask) { hartid = cpuid_to_hartid_map(cpuid); - if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) { + if (hmask && + (hartid < hbase || hartid >= hbase + BITS_PER_LONG)) { result = __sbi_rfence_v02_call(fid, hmask, hbase, start, size, arg4, arg5); if (result) return result; hmask = 0; - hbase = 0; } if (!hmask) - hbase = hartid; + hbase = hartid & -BITS_PER_LONG; hmask |= 1UL << (hartid - hbase); } But that means multiple SBI calls if you have e.g. hartids 1-64. The shifted mask solution doesn't suffer from that. Both solutions don't sort the CPUs, so they are suboptimal in case of hartid numberings like 0, 64, 1, 65, ... What do you think? Thanks! Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On Fri, Jan 28, 2022 at 9:39 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > On Fri, Jan 28, 2022 at 1:13 AM Atish Patra <atishp@atishpatra.org> wrote: > > On Thu, Jan 27, 2022 at 12:48 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > >> What about shifting hmask and adjusting hbase if a hartid is > >> lower than the current hbase? > > > > That will probably work for current systems but it will fail when we have hartid > 64. > > The below logic as it assumes that the hartids are in order. We can have a situation > > where a two consecutive cpuid belong to hartids that require two invocations of sbi call > > because the number of harts exceeds BITS_PER_LONG. > > If the number of harts exceeds BITS_PER_LONG, you always need multiple > calls, right? > > I think the below (gmail-whitespace-damaged diff) should work: > > --- a/arch/riscv/kernel/sbi.c > +++ b/arch/riscv/kernel/sbi.c > @@ -249,7 +249,7 @@ static void __sbi_set_timer_v02(uint64_t stime_value) > > static int __sbi_send_ipi_v02(const struct cpumask *cpu_mask) > { > - unsigned long hartid, cpuid, hmask = 0, hbase = 0; > + unsigned long hartid, cpuid, hmask = 0, hbase = 0, htop = 0; > struct sbiret ret = {0}; > int result; > > @@ -258,16 +258,27 @@ static int __sbi_send_ipi_v02(const struct > cpumask *cpu_mask) > > for_each_cpu(cpuid, cpu_mask) { > hartid = cpuid_to_hartid_map(cpuid); > - if (hmask && > - (hartid < hbase || hartid >= hbase + BITS_PER_LONG)) { Oops, I actually sent the diff against the simpler solution below, not against the current code, but I guess you get the idea. I can send a proper patch when agreed. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On Thu, Jan 27, 2022 at 6:32 AM Atish Patra <atishp@atishpatra.org> wrote: > > On Wed, Jan 26, 2022 at 1:10 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > > > Hi Atish, > > > > On Wed, Jan 26, 2022 at 9:28 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > > On Wed, Jan 26, 2022 at 3:21 AM Atish Patra <atishp@atishpatra.org> wrote: > > > > On Tue, Jan 25, 2022 at 2:26 PM Jessica Clarke <jrtc27@jrtc27.com> wrote: > > > > > On 20 Jan 2022, at 09:09, Atish Patra <atishp@rivosinc.com> wrote: > > > > > > Currently, SBI APIs accept a hartmask that is generated from struct > > > > > > cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it > > > > > > is not the correct data structure for hartids as it can be higher > > > > > > than NR_CPUs for platforms with sparse or discontguous hartids. > > > > > > > > > > > > Remove all association between hartid mask and struct cpumask. > > > > > > > > > > > > Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes) > > > > > > Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes) > > > > > > Signed-off-by: Atish Patra <atishp@rivosinc.com> > > > > > > > I am yet to reproduce it on my end. > > > > @Geert Uytterhoeven: can you please try the below diff on your end. > > > > > > Unfortunately it doesn't fix the issue for me. > > > > > > /me debugging... > > > > Found it: after this commit, the SBI_EXT_RFENCE_REMOTE_FENCE_I and > > SBI_EXT_RFENCE_REMOTE_SFENCE_VMA ecalls are now called with > > hmask = 0x8000000000000001 and hbase = 1 instead of hmask = 3 and > > hbase = 0. > > > > cpuid 1 maps to hartid 0 > > cpuid 0 maps to hartid 1 > > > > __sbi_rfence_v02:364: cpuid 1 hartid 0 > > __sbi_rfence_v02:377: hartid 0 hbase 1 > > hmask |= 1UL << (hartid - hbase); > > > > oops > > > > __sbi_rfence_v02_call:303: SBI_EXT_RFENCE_REMOTE_FENCE_I hmask > > 8000000000000001 hbase 1 > > > > Ahh yes. hmask will be incorrect if the bootcpu(cpu 0) is a higher > hartid and it is trying to do a remote tlb flush/IPI > to lower the hartid. We should generate the hartid array before the loop. > > Can you try this diff ? It seems to work for me during multiple boot > cycle on the unleashed. > > You can find the patch here as well > https://github.com/atishp04/linux/commits/v5.17-rc1 > > -------------------------------------------------------------------------------------------------------------------------------- > diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c > index f72527fcb347..4ebeb5813edc 100644 > --- a/arch/riscv/kernel/sbi.c > +++ b/arch/riscv/kernel/sbi.c > @@ -8,6 +8,8 @@ > #include <linux/init.h> > #include <linux/pm.h> > #include <linux/reboot.h> > +#include <linux/sort.h> > + > #include <asm/sbi.h> > #include <asm/smp.h> > > @@ -85,7 +87,7 @@ static unsigned long > __sbi_v01_cpumask_to_hartmask(const struct cpumask *cpu_mas > pr_warn("Unable to send any request to hartid > BITS_PER_LONG for > SBI v0.1\n"); > break; > } > - hmask |= 1 << hartid; > + hmask |= 1UL << hartid; > } > > return hmask; > @@ -160,7 +162,7 @@ static int __sbi_send_ipi_v01(const struct cpumask > *cpu_mask) > { > unsigned long hart_mask; > > - if (!cpu_mask) > + if (!cpu_mask || cpumask_empty(cpu_mask)) > cpu_mask = cpu_online_mask; > hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask); > > @@ -176,7 +178,7 @@ static int __sbi_rfence_v01(int fid, const struct > cpumask *cpu_mask, > int result = 0; > unsigned long hart_mask; > > - if (!cpu_mask) > + if (!cpu_mask || cpumask_empty(cpu_mask)) > cpu_mask = cpu_online_mask; > hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask); > > @@ -236,6 +238,18 @@ static int __sbi_rfence_v01(int fid, const struct > cpumask *cpu_mask, > static void sbi_set_power_off(void) {} > #endif /* CONFIG_RISCV_SBI_V01 */ > > +static int cmp_ulong(const void *A, const void *B) > +{ > + const unsigned long *a = A, *b = B; > + > + if (*a < *b) > + return -1; > + else if (*a > *b) > + return 1; > + else > + return 0; > +} > + > static void __sbi_set_timer_v02(uint64_t stime_value) > { > #if __riscv_xlen == 32 > @@ -251,13 +265,22 @@ static int __sbi_send_ipi_v02(const struct > cpumask *cpu_mask) > { > unsigned long hartid, cpuid, hmask = 0, hbase = 0; > struct sbiret ret = {0}; > - int result; > + int result, index = 0, max_index = 0; > + unsigned long hartid_arr[NR_CPUS] = {0}; No need to clear the hartid_arr[] because you have "index" and "max_index" telling us number of enteries. > > - if (!cpu_mask) > + if (!cpu_mask || cpumask_empty(cpu_mask)) > cpu_mask = cpu_online_mask; > > for_each_cpu(cpuid, cpu_mask) { > hartid = cpuid_to_hartid_map(cpuid); > + hartid_arr[index] = hartid; You can create a sorted array on the fly instead of calling sort() > + index++; > + } > + > + max_index = index; > + sort(hartid_arr, max_index, sizeof(unsigned long), cmp_ulong, NULL); > + for (index = 0; index < max_index; index++) { > + hartid = hartid_arr[index]; > if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) { > ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, > hmask, hbase, 0, 0, 0, 0); > @@ -345,13 +368,21 @@ static int __sbi_rfence_v02(int fid, const > struct cpumask *cpu_mask, > unsigned long arg4, unsigned long arg5) > { > unsigned long hartid, cpuid, hmask = 0, hbase = 0; > - int result; > + int result, index = 0, max_index = 0; > + unsigned long hartid_arr[NR_CPUS] = {0}; > > - if (!cpu_mask) > + if (!cpu_mask || cpumask_empty(cpu_mask)) > cpu_mask = cpu_online_mask; > > for_each_cpu(cpuid, cpu_mask) { > hartid = cpuid_to_hartid_map(cpuid); > + hartid_arr[index] = hartid; > + index++; > + } > + max_index = index; > + sort(hartid_arr, max_index, sizeof(unsigned long), cmp_ulong, NULL); > + for (index = 0; index < max_index; index++) { > + hartid = hartid_arr[index]; > if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) { > result = __sbi_rfence_v02_call(fid, hmask, hbase, > start, size, arg4, arg5); > > -------------------------------------------------------------------------------------------------------------------------------- > > > Gr{oetje,eeting}s, > > > > Geert > > > > -- > > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > > > In personal conversations with technical people, I call myself a hacker. But > > when I'm talking to journalists I just say "programmer" or something like that. > > -- Linus Torvalds > > > > -- > Regards, > Atish My main concern is the sizeof hartid_arr[] on stack. Using kmalloc() will only further slow it down. Further, for small systems with fewer HARTs, this sorting business will be a unnecessary overhead. Regards, Anup
On Fri, Jan 28, 2022 at 2:09 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > Hi Atish, > > On Fri, Jan 28, 2022 at 1:13 AM Atish Patra <atishp@atishpatra.org> wrote: > > On Thu, Jan 27, 2022 at 12:48 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > >> On Thu, Jan 27, 2022 at 2:02 AM Atish Patra <atishp@atishpatra.org> wrote: > >> > On Wed, Jan 26, 2022 at 1:10 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > >> > > On Wed, Jan 26, 2022 at 9:28 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > >> > > > On Wed, Jan 26, 2022 at 3:21 AM Atish Patra <atishp@atishpatra.org> wrote: > >> > > > > On Tue, Jan 25, 2022 at 2:26 PM Jessica Clarke <jrtc27@jrtc27.com> wrote: > >> > > > > > On 20 Jan 2022, at 09:09, Atish Patra <atishp@rivosinc.com> wrote: > >> > > > > > > Currently, SBI APIs accept a hartmask that is generated from struct > >> > > > > > > cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it > >> > > > > > > is not the correct data structure for hartids as it can be higher > >> > > > > > > than NR_CPUs for platforms with sparse or discontguous hartids. > >> > > > > > > > >> > > > > > > Remove all association between hartid mask and struct cpumask. > >> > > > > > > > >> > > > > > > Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes) > >> > > > > > > Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes) > >> > > > > > > Signed-off-by: Atish Patra <atishp@rivosinc.com> > >> > > > > >> > > > > I am yet to reproduce it on my end. > >> > > > > @Geert Uytterhoeven: can you please try the below diff on your end. > >> > > > > >> > > > Unfortunately it doesn't fix the issue for me. > >> > > > > >> > > > /me debugging... > >> > > > >> > > Found it: after this commit, the SBI_EXT_RFENCE_REMOTE_FENCE_I and > >> > > SBI_EXT_RFENCE_REMOTE_SFENCE_VMA ecalls are now called with > >> > > hmask = 0x8000000000000001 and hbase = 1 instead of hmask = 3 and > >> > > hbase = 0. > >> > > > >> > > cpuid 1 maps to hartid 0 > >> > > cpuid 0 maps to hartid 1 > >> > > > >> > > __sbi_rfence_v02:364: cpuid 1 hartid 0 > >> > > __sbi_rfence_v02:377: hartid 0 hbase 1 > >> > > hmask |= 1UL << (hartid - hbase); > >> > > > >> > > oops > >> > > > >> > > __sbi_rfence_v02_call:303: SBI_EXT_RFENCE_REMOTE_FENCE_I hmask > >> > > 8000000000000001 hbase 1 > >> > > > >> > > >> > Ahh yes. hmask will be incorrect if the bootcpu(cpu 0) is a higher > >> > hartid and it is trying to do a remote tlb flush/IPI > >> > to lower the hartid. We should generate the hartid array before the loop. > >> > > >> > Can you try this diff ? It seems to work for me during multiple boot > >> > cycle on the unleashed. > >> > > >> > You can find the patch here as well > >> > https://github.com/atishp04/linux/commits/v5.17-rc1 > > >> > @@ -345,13 +368,21 @@ static int __sbi_rfence_v02(int fid, const > >> > struct cpumask *cpu_mask, > >> > unsigned long arg4, unsigned long arg5) > >> > { > >> > unsigned long hartid, cpuid, hmask = 0, hbase = 0; > >> > - int result; > >> > + int result, index = 0, max_index = 0; > >> > + unsigned long hartid_arr[NR_CPUS] = {0}; > >> > >> That's up to 256 bytes on the stack. And more if the maximum > >> number of cores is increased. > >> > > > > Yeah. We can switch to dynamic allocation using kmalloc based on > > the number of bits set in the cpumask. > > Even more overhead... > > >> > - if (!cpu_mask) > >> > + if (!cpu_mask || cpumask_empty(cpu_mask)) > >> > cpu_mask = cpu_online_mask; > >> > > >> > for_each_cpu(cpuid, cpu_mask) { > >> > hartid = cpuid_to_hartid_map(cpuid); > >> > + hartid_arr[index] = hartid; > >> > + index++; > >> > + } > >> > + max_index = index; > >> > + sort(hartid_arr, max_index, sizeof(unsigned long), cmp_ulong, NULL); > >> > + for (index = 0; index < max_index; index++) { > >> > + hartid = hartid_arr[index]; > >> > >> That looks expensive to me. > >> > >> What about shifting hmask and adjusting hbase if a hartid is > >> lower than the current hbase? > > > > That will probably work for current systems but it will fail when we have hartid > 64. > > The below logic as it assumes that the hartids are in order. We can have a situation > > where a two consecutive cpuid belong to hartids that require two invocations of sbi call > > because the number of harts exceeds BITS_PER_LONG. > > If the number of harts exceeds BITS_PER_LONG, you always need multiple > calls, right? > > I think the below (gmail-whitespace-damaged diff) should work: > > --- a/arch/riscv/kernel/sbi.c > +++ b/arch/riscv/kernel/sbi.c > @@ -249,7 +249,7 @@ static void __sbi_set_timer_v02(uint64_t stime_value) > > static int __sbi_send_ipi_v02(const struct cpumask *cpu_mask) > { > - unsigned long hartid, cpuid, hmask = 0, hbase = 0; > + unsigned long hartid, cpuid, hmask = 0, hbase = 0, htop = 0; > struct sbiret ret = {0}; > int result; > > @@ -258,16 +258,27 @@ static int __sbi_send_ipi_v02(const struct > cpumask *cpu_mask) > > for_each_cpu(cpuid, cpu_mask) { > hartid = cpuid_to_hartid_map(cpuid); > - if (hmask && > - (hartid < hbase || hartid >= hbase + BITS_PER_LONG)) { > - ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, > - hmask, hbase, 0, 0, 0, 0); > - if (ret.error) > - goto ecall_failed; > - hmask = 0; > + if (hmask) { > + if (hartid + BITS_PER_LONG <= htop || > + hartid >= hbase + BITS_PER_LONG) { > + ret = sbi_ecall(SBI_EXT_IPI, > + SBI_EXT_IPI_SEND_IPI, hmask, > + hbase, 0, 0, 0, 0); > + if (ret.error) > + goto ecall_failed; > + hmask = 0; > + } else if (hartid < hbase) { > + /* shift the mask to fit lower hartid */ > + hmask <<= hbase - hartid; > + hbase = hartid; > + } > } > - if (!hmask) > + if (!hmask) { > hbase = hartid & -BITS_PER_LONG; > + htop = hartid; > + } else if (hartid > htop) { > + htop = hartid; > + } > hmask |= 1UL << (hartid - hbase); > } > > @@ -344,7 +355,7 @@ static int __sbi_rfence_v02(int fid, const struct > cpumask *cpu_mask, > unsigned long start, unsigned long size, > unsigned long arg4, unsigned long arg5) > { > - unsigned long hartid, cpuid, hmask = 0, hbase = 0; > + unsigned long hartid, cpuid, hmask = 0, hbase = 0, htop = 0; > int result; > > if (!cpu_mask || cpumask_empty(cpu_mask)) > @@ -352,16 +363,26 @@ static int __sbi_rfence_v02(int fid, const > struct cpumask *cpu_mask, > > for_each_cpu(cpuid, cpu_mask) { > hartid = cpuid_to_hartid_map(cpuid); > - if (hmask && > - (hartid < hbase || hartid >= hbase + BITS_PER_LONG)) { > - result = __sbi_rfence_v02_call(fid, hmask, hbase, > - start, size, arg4, arg5); > - if (result) > - return result; > - hmask = 0; > + if (hmask) { > + if (hartid + BITS_PER_LONG <= htop || > + hartid >= hbase + BITS_PER_LONG) { > + result = __sbi_rfence_v02_call(fid, hmask, > + hbase, start, size, arg4, arg5); > + if (result) > + return result; > + hmask = 0; > + } else if (hartid < hbase) { > + /* shift the mask to fit lower hartid */ > + hmask <<= hbase - hartid; > + hbase = hartid; > + } > + } > + if (!hmask) { > + hbase = hartid; > + htop = hartid; > + } else if (hartid > htop) { > + htop = hartid; > } > - if (!hmask) > - hbase = hartid & -BITS_PER_LONG; > hmask |= 1UL << (hartid - hbase); > } > > Another simpler solution would be to just round hbase down to a > multiple of 32/64 (gmail-whitespace-damaged diff): > > --- a/arch/riscv/kernel/sbi.c > +++ b/arch/riscv/kernel/sbi.c > @@ -258,16 +258,16 @@ static int __sbi_send_ipi_v02(const struct > cpumask *cpu_mask) > > for_each_cpu(cpuid, cpu_mask) { > hartid = cpuid_to_hartid_map(cpuid); > - if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) { > + if (hmask && > + (hartid < hbase || hartid >= hbase + BITS_PER_LONG)) { > ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, > hmask, hbase, 0, 0, 0, 0); > if (ret.error) > goto ecall_failed; > hmask = 0; > - hbase = 0; > } > if (!hmask) > - hbase = hartid; > + hbase = hartid & -BITS_PER_LONG; > hmask |= 1UL << (hartid - hbase); > } > > @@ -352,16 +352,16 @@ static int __sbi_rfence_v02(int fid, const > struct cpumask *cpu_mask, > > for_each_cpu(cpuid, cpu_mask) { > hartid = cpuid_to_hartid_map(cpuid); > - if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) { > + if (hmask && > + (hartid < hbase || hartid >= hbase + BITS_PER_LONG)) { > result = __sbi_rfence_v02_call(fid, hmask, hbase, > start, size, arg4, arg5); > if (result) > return result; > hmask = 0; > - hbase = 0; > } > if (!hmask) > - hbase = hartid; > + hbase = hartid & -BITS_PER_LONG; > hmask |= 1UL << (hartid - hbase); > } > > But that means multiple SBI calls if you have e.g. hartids 1-64. > The shifted mask solution doesn't suffer from that. > Both solutions don't sort the CPUs, so they are suboptimal in case of > hartid numberings like 0, 64, 1, 65, ... In most cases, the hartids will be in sorted order under /cpus DT node but it is not guaranteed that boot_cpu will be having smallest hartid This means hartid numbering will be something like: 0, 1, 2, ....., 64, 0, 1, 2, .... 31, 0, 1, 2, ..... > > What do you think? Assuming hartids under /cpus DT node are ordered, I think your approach will only have one additional SBI call compared to Atish's approach but Atish's approach will require more memory with increasing NR_CPUS so I suggest we go with your approach. Can you send a patch with your approach ? Regards, Anup > Thanks! > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
Hi Anup, On Mon, Jan 31, 2022 at 1:09 PM Anup Patel <anup@brainfault.org> wrote: > On Fri, Jan 28, 2022 at 2:09 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > On Fri, Jan 28, 2022 at 1:13 AM Atish Patra <atishp@atishpatra.org> wrote: > > > On Thu, Jan 27, 2022 at 12:48 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > >> On Thu, Jan 27, 2022 at 2:02 AM Atish Patra <atishp@atishpatra.org> wrote: > > >> > On Wed, Jan 26, 2022 at 1:10 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > >> > > On Wed, Jan 26, 2022 at 9:28 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > >> > > > On Wed, Jan 26, 2022 at 3:21 AM Atish Patra <atishp@atishpatra.org> wrote: > > >> > > > > On Tue, Jan 25, 2022 at 2:26 PM Jessica Clarke <jrtc27@jrtc27.com> wrote: > > >> > > > > > On 20 Jan 2022, at 09:09, Atish Patra <atishp@rivosinc.com> wrote: > > >> > > > > > > Currently, SBI APIs accept a hartmask that is generated from struct > > >> > > > > > > cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it > > >> > > > > > > is not the correct data structure for hartids as it can be higher > > >> > > > > > > than NR_CPUs for platforms with sparse or discontguous hartids. > > >> > > > > > > > > >> > > > > > > Remove all association between hartid mask and struct cpumask. > > >> > > > > > > > > >> > > > > > > Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes) > > >> > > > > > > Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes) > > >> > > > > > > Signed-off-by: Atish Patra <atishp@rivosinc.com> > > >> > > > > > >> > > > > I am yet to reproduce it on my end. > > >> > > > > @Geert Uytterhoeven: can you please try the below diff on your end. > > >> > > > > > >> > > > Unfortunately it doesn't fix the issue for me. > > >> > > > > > >> > > > /me debugging... > > >> > > > > >> > > Found it: after this commit, the SBI_EXT_RFENCE_REMOTE_FENCE_I and > > >> > > SBI_EXT_RFENCE_REMOTE_SFENCE_VMA ecalls are now called with > > >> > > hmask = 0x8000000000000001 and hbase = 1 instead of hmask = 3 and > > >> > > hbase = 0. > > >> > > > > >> > > cpuid 1 maps to hartid 0 > > >> > > cpuid 0 maps to hartid 1 > > >> > > > > >> > > __sbi_rfence_v02:364: cpuid 1 hartid 0 > > >> > > __sbi_rfence_v02:377: hartid 0 hbase 1 > > >> > > hmask |= 1UL << (hartid - hbase); > > >> > > > > >> > > oops > > >> > > > > >> > > __sbi_rfence_v02_call:303: SBI_EXT_RFENCE_REMOTE_FENCE_I hmask > > >> > > 8000000000000001 hbase 1 > > >> > > > > >> > > > >> > Ahh yes. hmask will be incorrect if the bootcpu(cpu 0) is a higher > > >> > hartid and it is trying to do a remote tlb flush/IPI > > >> > to lower the hartid. We should generate the hartid array before the loop. > > >> > > > >> > Can you try this diff ? It seems to work for me during multiple boot > > >> > cycle on the unleashed. > > >> > > > >> > You can find the patch here as well > > >> > https://github.com/atishp04/linux/commits/v5.17-rc1 > > > > >> > @@ -345,13 +368,21 @@ static int __sbi_rfence_v02(int fid, const > > >> > struct cpumask *cpu_mask, > > >> > unsigned long arg4, unsigned long arg5) > > >> > { > > >> > unsigned long hartid, cpuid, hmask = 0, hbase = 0; > > >> > - int result; > > >> > + int result, index = 0, max_index = 0; > > >> > + unsigned long hartid_arr[NR_CPUS] = {0}; > > >> > > >> That's up to 256 bytes on the stack. And more if the maximum > > >> number of cores is increased. > > >> > > > > > > Yeah. We can switch to dynamic allocation using kmalloc based on > > > the number of bits set in the cpumask. > > > > Even more overhead... > > > > >> > - if (!cpu_mask) > > >> > + if (!cpu_mask || cpumask_empty(cpu_mask)) > > >> > cpu_mask = cpu_online_mask; > > >> > > > >> > for_each_cpu(cpuid, cpu_mask) { > > >> > hartid = cpuid_to_hartid_map(cpuid); > > >> > + hartid_arr[index] = hartid; > > >> > + index++; > > >> > + } > > >> > + max_index = index; > > >> > + sort(hartid_arr, max_index, sizeof(unsigned long), cmp_ulong, NULL); > > >> > + for (index = 0; index < max_index; index++) { > > >> > + hartid = hartid_arr[index]; > > >> > > >> That looks expensive to me. > > >> > > >> What about shifting hmask and adjusting hbase if a hartid is > > >> lower than the current hbase? > > > > > > That will probably work for current systems but it will fail when we have hartid > 64. > > > The below logic as it assumes that the hartids are in order. We can have a situation > > > where a two consecutive cpuid belong to hartids that require two invocations of sbi call > > > because the number of harts exceeds BITS_PER_LONG. > > > > If the number of harts exceeds BITS_PER_LONG, you always need multiple > > calls, right? > > > > I think the below (gmail-whitespace-damaged diff) should work: [...] > > > > Another simpler solution would be to just round hbase down to a > > multiple of 32/64 (gmail-whitespace-damaged diff): [...] > > But that means multiple SBI calls if you have e.g. hartids 1-64. > > The shifted mask solution doesn't suffer from that. > > Both solutions don't sort the CPUs, so they are suboptimal in case of > > hartid numberings like 0, 64, 1, 65, ... > > In most cases, the hartids will be in sorted order under /cpus DT node > but it is not guaranteed that boot_cpu will be having smallest hartid > > This means hartid numbering will be something like: > 0, 1, 2, ....., > 64, 0, 1, 2, .... > 31, 0, 1, 2, ..... > > > > > What do you think? > > Assuming hartids under /cpus DT node are ordered, I think your > approach will only have one additional SBI call compared to Atish's > approach but Atish's approach will require more memory with > increasing NR_CPUS so I suggest we go with your approach. > > Can you send a patch with your approach ? Sure, done. https://lore.kernel.org/r/cover.1643635156.git.geert@linux-m68k.org/ Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 26ba6f2d7a40..d1c37479d828 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -8,6 +8,7 @@ #define _ASM_RISCV_SBI_H #include <linux/types.h> +#include <linux/cpumask.h> #ifdef CONFIG_RISCV_SBI enum sbi_ext_id { @@ -128,27 +129,27 @@ long sbi_get_mimpid(void); void sbi_set_timer(uint64_t stime_value); void sbi_shutdown(void); void sbi_clear_ipi(void); -int sbi_send_ipi(const unsigned long *hart_mask); -int sbi_remote_fence_i(const unsigned long *hart_mask); -int sbi_remote_sfence_vma(const unsigned long *hart_mask, +int sbi_send_ipi(const struct cpumask *cpu_mask); +int sbi_remote_fence_i(const struct cpumask *cpu_mask); +int sbi_remote_sfence_vma(const struct cpumask *cpu_mask, unsigned long start, unsigned long size); -int sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, +int sbi_remote_sfence_vma_asid(const struct cpumask *cpu_mask, unsigned long start, unsigned long size, unsigned long asid); -int sbi_remote_hfence_gvma(const unsigned long *hart_mask, +int sbi_remote_hfence_gvma(const struct cpumask *cpu_mask, unsigned long start, unsigned long size); -int sbi_remote_hfence_gvma_vmid(const unsigned long *hart_mask, +int sbi_remote_hfence_gvma_vmid(const struct cpumask *cpu_mask, unsigned long start, unsigned long size, unsigned long vmid); -int sbi_remote_hfence_vvma(const unsigned long *hart_mask, +int sbi_remote_hfence_vvma(const struct cpumask *cpu_mask, unsigned long start, unsigned long size); -int sbi_remote_hfence_vvma_asid(const unsigned long *hart_mask, +int sbi_remote_hfence_vvma_asid(const struct cpumask *cpu_mask, unsigned long start, unsigned long size, unsigned long asid); @@ -183,7 +184,7 @@ static inline unsigned long sbi_mk_version(unsigned long major, int sbi_err_map_linux_errno(int err); #else /* CONFIG_RISCV_SBI */ -static inline int sbi_remote_fence_i(const unsigned long *hart_mask) { return -1; } +static inline int sbi_remote_fence_i(const struct cpumask *cpu_mask) { return -1; } static inline void sbi_init(void) {} #endif /* CONFIG_RISCV_SBI */ #endif /* _ASM_RISCV_SBI_H */ diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h index 6ad749f42807..23170c933d73 100644 --- a/arch/riscv/include/asm/smp.h +++ b/arch/riscv/include/asm/smp.h @@ -92,8 +92,6 @@ static inline void riscv_clear_ipi(void) #endif /* CONFIG_SMP */ -void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out); - #if defined(CONFIG_HOTPLUG_CPU) && (CONFIG_SMP) bool cpu_has_hotplug(unsigned int cpu); #else diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c index 9a84f0cb5175..f72527fcb347 100644 --- a/arch/riscv/kernel/sbi.c +++ b/arch/riscv/kernel/sbi.c @@ -16,8 +16,8 @@ unsigned long sbi_spec_version __ro_after_init = SBI_SPEC_VERSION_DEFAULT; EXPORT_SYMBOL(sbi_spec_version); static void (*__sbi_set_timer)(uint64_t stime) __ro_after_init; -static int (*__sbi_send_ipi)(const unsigned long *hart_mask) __ro_after_init; -static int (*__sbi_rfence)(int fid, const unsigned long *hart_mask, +static int (*__sbi_send_ipi)(const struct cpumask *cpu_mask) __ro_after_init; +static int (*__sbi_rfence)(int fid, const struct cpumask *cpu_mask, unsigned long start, unsigned long size, unsigned long arg4, unsigned long arg5) __ro_after_init; @@ -67,6 +67,30 @@ int sbi_err_map_linux_errno(int err) EXPORT_SYMBOL(sbi_err_map_linux_errno); #ifdef CONFIG_RISCV_SBI_V01 +static unsigned long __sbi_v01_cpumask_to_hartmask(const struct cpumask *cpu_mask) +{ + unsigned long cpuid, hartid; + unsigned long hmask = 0; + + /* + * There is no maximum hartid concept in RISC-V and NR_CPUS must not be + * associated with hartid. As SBI v0.1 is only kept for backward compatibility + * and will be removed in the future, there is no point in supporting hartid + * greater than BITS_PER_LONG (32 for RV32 and 64 for RV64). Ideally, SBI v0.2 + * should be used for platforms with hartid greater than BITS_PER_LONG. + */ + for_each_cpu(cpuid, cpu_mask) { + hartid = cpuid_to_hartid_map(cpuid); + if (hartid >= BITS_PER_LONG) { + pr_warn("Unable to send any request to hartid > BITS_PER_LONG for SBI v0.1\n"); + break; + } + hmask |= 1 << hartid; + } + + return hmask; +} + /** * sbi_console_putchar() - Writes given character to the console device. * @ch: The data to be written to the console. @@ -132,33 +156,44 @@ static void __sbi_set_timer_v01(uint64_t stime_value) #endif } -static int __sbi_send_ipi_v01(const unsigned long *hart_mask) +static int __sbi_send_ipi_v01(const struct cpumask *cpu_mask) { - sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)hart_mask, + unsigned long hart_mask; + + if (!cpu_mask) + cpu_mask = cpu_online_mask; + hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask); + + sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)(&hart_mask), 0, 0, 0, 0, 0); return 0; } -static int __sbi_rfence_v01(int fid, const unsigned long *hart_mask, +static int __sbi_rfence_v01(int fid, const struct cpumask *cpu_mask, unsigned long start, unsigned long size, unsigned long arg4, unsigned long arg5) { int result = 0; + unsigned long hart_mask; + + if (!cpu_mask) + cpu_mask = cpu_online_mask; + hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask); /* v0.2 function IDs are equivalent to v0.1 extension IDs */ switch (fid) { case SBI_EXT_RFENCE_REMOTE_FENCE_I: sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0, - (unsigned long)hart_mask, 0, 0, 0, 0, 0); + (unsigned long)&hart_mask, 0, 0, 0, 0, 0); break; case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA: sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0, - (unsigned long)hart_mask, start, size, + (unsigned long)&hart_mask, start, size, 0, 0, 0); break; case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID: sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0, - (unsigned long)hart_mask, start, size, + (unsigned long)&hart_mask, start, size, arg4, 0, 0); break; default: @@ -180,7 +215,7 @@ static void __sbi_set_timer_v01(uint64_t stime_value) sbi_major_version(), sbi_minor_version()); } -static int __sbi_send_ipi_v01(const unsigned long *hart_mask) +static int __sbi_send_ipi_v01(const struct cpumask *cpu_mask) { pr_warn("IPI extension is not available in SBI v%lu.%lu\n", sbi_major_version(), sbi_minor_version()); @@ -188,7 +223,7 @@ static int __sbi_send_ipi_v01(const unsigned long *hart_mask) return 0; } -static int __sbi_rfence_v01(int fid, const unsigned long *hart_mask, +static int __sbi_rfence_v01(int fid, const struct cpumask *cpu_mask, unsigned long start, unsigned long size, unsigned long arg4, unsigned long arg5) { @@ -212,37 +247,33 @@ static void __sbi_set_timer_v02(uint64_t stime_value) #endif } -static int __sbi_send_ipi_v02(const unsigned long *hart_mask) +static int __sbi_send_ipi_v02(const struct cpumask *cpu_mask) { - unsigned long hartid, hmask_val, hbase; - struct cpumask tmask; + unsigned long hartid, cpuid, hmask = 0, hbase = 0; struct sbiret ret = {0}; int result; - if (!hart_mask || !(*hart_mask)) { - riscv_cpuid_to_hartid_mask(cpu_online_mask, &tmask); - hart_mask = cpumask_bits(&tmask); - } + if (!cpu_mask) + cpu_mask = cpu_online_mask; - hmask_val = 0; - hbase = 0; - for_each_set_bit(hartid, hart_mask, NR_CPUS) { - if (hmask_val && ((hbase + BITS_PER_LONG) <= hartid)) { + for_each_cpu(cpuid, cpu_mask) { + hartid = cpuid_to_hartid_map(cpuid); + if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) { ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, - hmask_val, hbase, 0, 0, 0, 0); + hmask, hbase, 0, 0, 0, 0); if (ret.error) goto ecall_failed; - hmask_val = 0; + hmask = 0; hbase = 0; } - if (!hmask_val) + if (!hmask) hbase = hartid; - hmask_val |= 1UL << (hartid - hbase); + hmask |= 1UL << (hartid - hbase); } - if (hmask_val) { + if (hmask) { ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, - hmask_val, hbase, 0, 0, 0, 0); + hmask, hbase, 0, 0, 0, 0); if (ret.error) goto ecall_failed; } @@ -252,11 +283,11 @@ static int __sbi_send_ipi_v02(const unsigned long *hart_mask) ecall_failed: result = sbi_err_map_linux_errno(ret.error); pr_err("%s: hbase = [%lu] hmask = [0x%lx] failed (error [%d])\n", - __func__, hbase, hmask_val, result); + __func__, hbase, hmask, result); return result; } -static int __sbi_rfence_v02_call(unsigned long fid, unsigned long hmask_val, +static int __sbi_rfence_v02_call(unsigned long fid, unsigned long hmask, unsigned long hbase, unsigned long start, unsigned long size, unsigned long arg4, unsigned long arg5) @@ -267,31 +298,31 @@ static int __sbi_rfence_v02_call(unsigned long fid, unsigned long hmask_val, switch (fid) { case SBI_EXT_RFENCE_REMOTE_FENCE_I: - ret = sbi_ecall(ext, fid, hmask_val, hbase, 0, 0, 0, 0); + ret = sbi_ecall(ext, fid, hmask, hbase, 0, 0, 0, 0); break; case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA: - ret = sbi_ecall(ext, fid, hmask_val, hbase, start, + ret = sbi_ecall(ext, fid, hmask, hbase, start, size, 0, 0); break; case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID: - ret = sbi_ecall(ext, fid, hmask_val, hbase, start, + ret = sbi_ecall(ext, fid, hmask, hbase, start, size, arg4, 0); break; case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA: - ret = sbi_ecall(ext, fid, hmask_val, hbase, start, + ret = sbi_ecall(ext, fid, hmask, hbase, start, size, 0, 0); break; case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID: - ret = sbi_ecall(ext, fid, hmask_val, hbase, start, + ret = sbi_ecall(ext, fid, hmask, hbase, start, size, arg4, 0); break; case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA: - ret = sbi_ecall(ext, fid, hmask_val, hbase, start, + ret = sbi_ecall(ext, fid, hmask, hbase, start, size, 0, 0); break; case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID: - ret = sbi_ecall(ext, fid, hmask_val, hbase, start, + ret = sbi_ecall(ext, fid, hmask, hbase, start, size, arg4, 0); break; default: @@ -303,43 +334,39 @@ static int __sbi_rfence_v02_call(unsigned long fid, unsigned long hmask_val, if (ret.error) { result = sbi_err_map_linux_errno(ret.error); pr_err("%s: hbase = [%lu] hmask = [0x%lx] failed (error [%d])\n", - __func__, hbase, hmask_val, result); + __func__, hbase, hmask, result); } return result; } -static int __sbi_rfence_v02(int fid, const unsigned long *hart_mask, +static int __sbi_rfence_v02(int fid, const struct cpumask *cpu_mask, unsigned long start, unsigned long size, unsigned long arg4, unsigned long arg5) { - unsigned long hmask_val, hartid, hbase; - struct cpumask tmask; + unsigned long hartid, cpuid, hmask = 0, hbase = 0; int result; - if (!hart_mask || !(*hart_mask)) { - riscv_cpuid_to_hartid_mask(cpu_online_mask, &tmask); - hart_mask = cpumask_bits(&tmask); - } + if (!cpu_mask) + cpu_mask = cpu_online_mask; - hmask_val = 0; - hbase = 0; - for_each_set_bit(hartid, hart_mask, NR_CPUS) { - if (hmask_val && ((hbase + BITS_PER_LONG) <= hartid)) { - result = __sbi_rfence_v02_call(fid, hmask_val, hbase, + for_each_cpu(cpuid, cpu_mask) { + hartid = cpuid_to_hartid_map(cpuid); + if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) { + result = __sbi_rfence_v02_call(fid, hmask, hbase, start, size, arg4, arg5); if (result) return result; - hmask_val = 0; + hmask = 0; hbase = 0; } - if (!hmask_val) + if (!hmask) hbase = hartid; - hmask_val |= 1UL << (hartid - hbase); + hmask |= 1UL << (hartid - hbase); } - if (hmask_val) { - result = __sbi_rfence_v02_call(fid, hmask_val, hbase, + if (hmask) { + result = __sbi_rfence_v02_call(fid, hmask, hbase, start, size, arg4, arg5); if (result) return result; @@ -361,44 +388,44 @@ void sbi_set_timer(uint64_t stime_value) /** * sbi_send_ipi() - Send an IPI to any hart. - * @hart_mask: A cpu mask containing all the target harts. + * @cpu_mask: A cpu mask containing all the target harts. * * Return: 0 on success, appropriate linux error code otherwise. */ -int sbi_send_ipi(const unsigned long *hart_mask) +int sbi_send_ipi(const struct cpumask *cpu_mask) { - return __sbi_send_ipi(hart_mask); + return __sbi_send_ipi(cpu_mask); } EXPORT_SYMBOL(sbi_send_ipi); /** * sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts. - * @hart_mask: A cpu mask containing all the target harts. + * @cpu_mask: A cpu mask containing all the target harts. * * Return: 0 on success, appropriate linux error code otherwise. */ -int sbi_remote_fence_i(const unsigned long *hart_mask) +int sbi_remote_fence_i(const struct cpumask *cpu_mask) { return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_FENCE_I, - hart_mask, 0, 0, 0, 0); + cpu_mask, 0, 0, 0, 0); } EXPORT_SYMBOL(sbi_remote_fence_i); /** * sbi_remote_sfence_vma() - Execute SFENCE.VMA instructions on given remote * harts for the specified virtual address range. - * @hart_mask: A cpu mask containing all the target harts. + * @cpu_mask: A cpu mask containing all the target harts. * @start: Start of the virtual address * @size: Total size of the virtual address range. * * Return: 0 on success, appropriate linux error code otherwise. */ -int sbi_remote_sfence_vma(const unsigned long *hart_mask, +int sbi_remote_sfence_vma(const struct cpumask *cpu_mask, unsigned long start, unsigned long size) { return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_SFENCE_VMA, - hart_mask, start, size, 0, 0); + cpu_mask, start, size, 0, 0); } EXPORT_SYMBOL(sbi_remote_sfence_vma); @@ -406,38 +433,38 @@ EXPORT_SYMBOL(sbi_remote_sfence_vma); * sbi_remote_sfence_vma_asid() - Execute SFENCE.VMA instructions on given * remote harts for a virtual address range belonging to a specific ASID. * - * @hart_mask: A cpu mask containing all the target harts. + * @cpu_mask: A cpu mask containing all the target harts. * @start: Start of the virtual address * @size: Total size of the virtual address range. * @asid: The value of address space identifier (ASID). * * Return: 0 on success, appropriate linux error code otherwise. */ -int sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, +int sbi_remote_sfence_vma_asid(const struct cpumask *cpu_mask, unsigned long start, unsigned long size, unsigned long asid) { return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID, - hart_mask, start, size, asid, 0); + cpu_mask, start, size, asid, 0); } EXPORT_SYMBOL(sbi_remote_sfence_vma_asid); /** * sbi_remote_hfence_gvma() - Execute HFENCE.GVMA instructions on given remote * harts for the specified guest physical address range. - * @hart_mask: A cpu mask containing all the target harts. + * @cpu_mask: A cpu mask containing all the target harts. * @start: Start of the guest physical address * @size: Total size of the guest physical address range. * * Return: None */ -int sbi_remote_hfence_gvma(const unsigned long *hart_mask, +int sbi_remote_hfence_gvma(const struct cpumask *cpu_mask, unsigned long start, unsigned long size) { return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA, - hart_mask, start, size, 0, 0); + cpu_mask, start, size, 0, 0); } EXPORT_SYMBOL_GPL(sbi_remote_hfence_gvma); @@ -445,38 +472,38 @@ EXPORT_SYMBOL_GPL(sbi_remote_hfence_gvma); * sbi_remote_hfence_gvma_vmid() - Execute HFENCE.GVMA instructions on given * remote harts for a guest physical address range belonging to a specific VMID. * - * @hart_mask: A cpu mask containing all the target harts. + * @cpu_mask: A cpu mask containing all the target harts. * @start: Start of the guest physical address * @size: Total size of the guest physical address range. * @vmid: The value of guest ID (VMID). * * Return: 0 if success, Error otherwise. */ -int sbi_remote_hfence_gvma_vmid(const unsigned long *hart_mask, +int sbi_remote_hfence_gvma_vmid(const struct cpumask *cpu_mask, unsigned long start, unsigned long size, unsigned long vmid) { return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID, - hart_mask, start, size, vmid, 0); + cpu_mask, start, size, vmid, 0); } EXPORT_SYMBOL(sbi_remote_hfence_gvma_vmid); /** * sbi_remote_hfence_vvma() - Execute HFENCE.VVMA instructions on given remote * harts for the current guest virtual address range. - * @hart_mask: A cpu mask containing all the target harts. + * @cpu_mask: A cpu mask containing all the target harts. * @start: Start of the current guest virtual address * @size: Total size of the current guest virtual address range. * * Return: None */ -int sbi_remote_hfence_vvma(const unsigned long *hart_mask, +int sbi_remote_hfence_vvma(const struct cpumask *cpu_mask, unsigned long start, unsigned long size) { return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA, - hart_mask, start, size, 0, 0); + cpu_mask, start, size, 0, 0); } EXPORT_SYMBOL(sbi_remote_hfence_vvma); @@ -485,20 +512,20 @@ EXPORT_SYMBOL(sbi_remote_hfence_vvma); * remote harts for current guest virtual address range belonging to a specific * ASID. * - * @hart_mask: A cpu mask containing all the target harts. + * @cpu_mask: A cpu mask containing all the target harts. * @start: Start of the current guest virtual address * @size: Total size of the current guest virtual address range. * @asid: The value of address space identifier (ASID). * * Return: None */ -int sbi_remote_hfence_vvma_asid(const unsigned long *hart_mask, +int sbi_remote_hfence_vvma_asid(const struct cpumask *cpu_mask, unsigned long start, unsigned long size, unsigned long asid) { return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID, - hart_mask, start, size, asid, 0); + cpu_mask, start, size, asid, 0); } EXPORT_SYMBOL(sbi_remote_hfence_vvma_asid); @@ -591,11 +618,7 @@ long sbi_get_mimpid(void) static void sbi_send_cpumask_ipi(const struct cpumask *target) { - struct cpumask hartid_mask; - - riscv_cpuid_to_hartid_mask(target, &hartid_mask); - - sbi_send_ipi(cpumask_bits(&hartid_mask)); + sbi_send_ipi(target); } static const struct riscv_ipi_ops sbi_ipi_ops = { diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c index 63241abe84eb..b42bfdc67482 100644 --- a/arch/riscv/kernel/setup.c +++ b/arch/riscv/kernel/setup.c @@ -59,16 +59,6 @@ atomic_t hart_lottery __section(".sdata") unsigned long boot_cpu_hartid; static DEFINE_PER_CPU(struct cpu, cpu_devices); -void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out) -{ - int cpu; - - cpumask_clear(out); - for_each_cpu(cpu, in) - cpumask_set_cpu(cpuid_to_hartid_map(cpu), out); -} -EXPORT_SYMBOL_GPL(riscv_cpuid_to_hartid_mask); - /* * Place kernel memory regions on the resource tree so that * kexec-tools can retrieve them from /proc/iomem. While there diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index bd82375db51a..622f226454d5 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -96,7 +96,7 @@ void __init setup_smp(void) if (cpuid >= NR_CPUS) { pr_warn("Invalid cpuid [%d] for hartid [%d]\n", cpuid, hart); - break; + continue; } cpuid_to_hartid_map(cpuid) = hart; diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c index 9af67dbdc66a..f80a34fbf102 100644 --- a/arch/riscv/kvm/mmu.c +++ b/arch/riscv/kvm/mmu.c @@ -114,7 +114,6 @@ static bool stage2_get_leaf_entry(struct kvm *kvm, gpa_t addr, static void stage2_remote_tlb_flush(struct kvm *kvm, u32 level, gpa_t addr) { - struct cpumask hmask; unsigned long size = PAGE_SIZE; struct kvm_vmid *vmid = &kvm->arch.vmid; @@ -127,8 +126,7 @@ static void stage2_remote_tlb_flush(struct kvm *kvm, u32 level, gpa_t addr) * where the Guest/VM is running. */ preempt_disable(); - riscv_cpuid_to_hartid_mask(cpu_online_mask, &hmask); - sbi_remote_hfence_gvma_vmid(cpumask_bits(&hmask), addr, size, + sbi_remote_hfence_gvma_vmid(cpu_online_mask, addr, size, READ_ONCE(vmid->vmid)); preempt_enable(); } diff --git a/arch/riscv/kvm/vcpu_sbi_replace.c b/arch/riscv/kvm/vcpu_sbi_replace.c index 00036b7f83b9..1bc0608a5bfd 100644 --- a/arch/riscv/kvm/vcpu_sbi_replace.c +++ b/arch/riscv/kvm/vcpu_sbi_replace.c @@ -82,7 +82,7 @@ static int kvm_sbi_ext_rfence_handler(struct kvm_vcpu *vcpu, struct kvm_run *run { int ret = 0; unsigned long i; - struct cpumask cm, hm; + struct cpumask cm; struct kvm_vcpu *tmp; struct kvm_cpu_context *cp = &vcpu->arch.guest_context; unsigned long hmask = cp->a0; @@ -90,7 +90,6 @@ static int kvm_sbi_ext_rfence_handler(struct kvm_vcpu *vcpu, struct kvm_run *run unsigned long funcid = cp->a6; cpumask_clear(&cm); - cpumask_clear(&hm); kvm_for_each_vcpu(i, tmp, vcpu->kvm) { if (hbase != -1UL) { if (tmp->vcpu_id < hbase) @@ -103,17 +102,15 @@ static int kvm_sbi_ext_rfence_handler(struct kvm_vcpu *vcpu, struct kvm_run *run cpumask_set_cpu(tmp->cpu, &cm); } - riscv_cpuid_to_hartid_mask(&cm, &hm); - switch (funcid) { case SBI_EXT_RFENCE_REMOTE_FENCE_I: - ret = sbi_remote_fence_i(cpumask_bits(&hm)); + ret = sbi_remote_fence_i(&cm); break; case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA: - ret = sbi_remote_hfence_vvma(cpumask_bits(&hm), cp->a2, cp->a3); + ret = sbi_remote_hfence_vvma(&cm, cp->a2, cp->a3); break; case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID: - ret = sbi_remote_hfence_vvma_asid(cpumask_bits(&hm), cp->a2, + ret = sbi_remote_hfence_vvma_asid(&cm, cp->a2, cp->a3, cp->a4); break; case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA: diff --git a/arch/riscv/kvm/vcpu_sbi_v01.c b/arch/riscv/kvm/vcpu_sbi_v01.c index 4c7e13ec9ccc..07e2de14433a 100644 --- a/arch/riscv/kvm/vcpu_sbi_v01.c +++ b/arch/riscv/kvm/vcpu_sbi_v01.c @@ -38,7 +38,7 @@ static int kvm_sbi_ext_v01_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, int i, ret = 0; u64 next_cycle; struct kvm_vcpu *rvcpu; - struct cpumask cm, hm; + struct cpumask cm; struct kvm *kvm = vcpu->kvm; struct kvm_cpu_context *cp = &vcpu->arch.guest_context; @@ -101,15 +101,12 @@ static int kvm_sbi_ext_v01_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, continue; cpumask_set_cpu(rvcpu->cpu, &cm); } - riscv_cpuid_to_hartid_mask(&cm, &hm); if (cp->a7 == SBI_EXT_0_1_REMOTE_FENCE_I) - ret = sbi_remote_fence_i(cpumask_bits(&hm)); + ret = sbi_remote_fence_i(&cm); else if (cp->a7 == SBI_EXT_0_1_REMOTE_SFENCE_VMA) - ret = sbi_remote_hfence_vvma(cpumask_bits(&hm), - cp->a1, cp->a2); + ret = sbi_remote_hfence_vvma(&cm, cp->a1, cp->a2); else - ret = sbi_remote_hfence_vvma_asid(cpumask_bits(&hm), - cp->a1, cp->a2, cp->a3); + ret = sbi_remote_hfence_vvma_asid(&cm, cp->a1, cp->a2, cp->a3); break; default: ret = -EINVAL; diff --git a/arch/riscv/kvm/vmid.c b/arch/riscv/kvm/vmid.c index 807228f8f409..2fa4f7b1813d 100644 --- a/arch/riscv/kvm/vmid.c +++ b/arch/riscv/kvm/vmid.c @@ -67,7 +67,6 @@ void kvm_riscv_stage2_vmid_update(struct kvm_vcpu *vcpu) { unsigned long i; struct kvm_vcpu *v; - struct cpumask hmask; struct kvm_vmid *vmid = &vcpu->kvm->arch.vmid; if (!kvm_riscv_stage2_vmid_ver_changed(vmid)) @@ -102,8 +101,7 @@ void kvm_riscv_stage2_vmid_update(struct kvm_vcpu *vcpu) * running, we force VM exits on all host CPUs using IPI and * flush all Guest TLBs. */ - riscv_cpuid_to_hartid_mask(cpu_online_mask, &hmask); - sbi_remote_hfence_gvma(cpumask_bits(&hmask), 0, 0); + sbi_remote_hfence_gvma(cpu_online_mask, 0, 0); } vmid->vmid = vmid_next; diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c index 89f81067e09e..6cb7d96ad9c7 100644 --- a/arch/riscv/mm/cacheflush.c +++ b/arch/riscv/mm/cacheflush.c @@ -67,10 +67,7 @@ void flush_icache_mm(struct mm_struct *mm, bool local) */ smp_mb(); } else if (IS_ENABLED(CONFIG_RISCV_SBI)) { - cpumask_t hartid_mask; - - riscv_cpuid_to_hartid_mask(&others, &hartid_mask); - sbi_remote_fence_i(cpumask_bits(&hartid_mask)); + sbi_remote_fence_i(&others); } else { on_each_cpu_mask(&others, ipi_remote_fence_i, NULL, 1); } diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c index 64f8201237c2..37ed760d007c 100644 --- a/arch/riscv/mm/tlbflush.c +++ b/arch/riscv/mm/tlbflush.c @@ -32,7 +32,6 @@ static void __sbi_tlb_flush_range(struct mm_struct *mm, unsigned long start, unsigned long size, unsigned long stride) { struct cpumask *cmask = mm_cpumask(mm); - struct cpumask hmask; unsigned int cpuid; bool broadcast; @@ -46,9 +45,7 @@ static void __sbi_tlb_flush_range(struct mm_struct *mm, unsigned long start, unsigned long asid = atomic_long_read(&mm->context.id); if (broadcast) { - riscv_cpuid_to_hartid_mask(cmask, &hmask); - sbi_remote_sfence_vma_asid(cpumask_bits(&hmask), - start, size, asid); + sbi_remote_sfence_vma_asid(cmask, start, size, asid); } else if (size <= stride) { local_flush_tlb_page_asid(start, asid); } else { @@ -56,9 +53,7 @@ static void __sbi_tlb_flush_range(struct mm_struct *mm, unsigned long start, } } else { if (broadcast) { - riscv_cpuid_to_hartid_mask(cmask, &hmask); - sbi_remote_sfence_vma(cpumask_bits(&hmask), - start, size); + sbi_remote_sfence_vma(cmask, start, size); } else if (size <= stride) { local_flush_tlb_page(start); } else {