From patchwork Fri Apr 22 07:25:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12822877 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8D353C433EF for ; Fri, 22 Apr 2022 07:26:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=DIbw0FauEFE3i+U27viJwdRMbnGzaL8QDmwLAn8XnsM=; b=FMBVS5OkroDTpl R4QMqfwss2imar2vHhYgs9eXoGhoqCtNS6WX4l470P3UYt5U9w5in3/2diQNJsc+K173mxTxRoxdR LvT5uqGqPJiz3320/gzMwhXJkc2zBCKn/rbUFCVPwM+4kJ6AaFBEoqxmwOsY1/CUPtUuMk0d44K2O yeEczdq/fg6SMcNuVHLY71V7S097LCK2lmytIVUukUTXyMOmj/SU1DlbsUQdeR/2h3opBNdW9wWhc SjEkeyj4oU3KvS++j6EvFHBypFmgtom/4TIXxI35u8/y1gyCiowk2wKZsNSdp7Dq1YMWmCLFSB6rf 5VmXCt5PMZIF7jhnJOkA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nhngE-00GnAx-V5; Fri, 22 Apr 2022 07:26:15 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nhng3-00Gn5z-88 for linux-riscv@lists.infradead.org; Fri, 22 Apr 2022 07:26:10 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1650612364; x=1682148364; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xD0I5xV7kWeZLBUmPepIj83tk4qE1jeszPPagX3C5ew=; b=bADNML8xPJzMb4m0bHGbrN3nRxxpXGrbtHG88ClhbbwZs+i+tTIcJOK+ riV+82LPwBGDFyIIVnsij+bzB7UbQjHTcnBSB3AgphisozFwvKPRD4nk+ 8Cp3Q4b9nd2g1iYSv+w0s/AU9Er9FJyVoUqHMlGxLvCl3uiJhOO80CtA7 rhhBPIwFb1m9+2qnxojJSZ7M8LYvgsa09VeRWb0zW66ZtkO3kmr4tsssL SqaIhdc9FVWXOP+58SJ+uTx2frMz5EAueFUgDCp+r0l1c5pERXslDMUoM 0dG3UNVX8jgFALjo8/0RL/7F+2oGoFw5+7bGhC5XY3PDlSblDJ2/ZeLu1 A==; X-IronPort-AV: E=Sophos;i="5.90,281,1643698800"; d="scan'208";a="153462810" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 22 Apr 2022 00:26:03 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Fri, 22 Apr 2022 00:26:02 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Fri, 22 Apr 2022 00:26:00 -0700 From: Conor Dooley To: Palmer Dabbelt CC: Paul Walmsley , Albert Ou , , , , , , Conor Dooley Subject: [PATCH v3 2/4] riscv: config: enable the mailbox framework Date: Fri, 22 Apr 2022 08:25:31 +0100 Message-ID: <20220422072533.2582084-3-conor.dooley@microchip.com> X-Mailer: git-send-email 2.35.2 In-Reply-To: <20220422072533.2582084-1-conor.dooley@microchip.com> References: <20220422072533.2582084-1-conor.dooley@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220422_002603_374760_21D58C51 X-CRM114-Status: UNSURE ( 6.73 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add the mailbox framework so that the system controller drivers get compiled for PolarFire SoC. Signed-off-by: Conor Dooley --- arch/riscv/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 30e3017f22bc..e8472ffbb4dc 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -100,6 +100,7 @@ CONFIG_VIRTIO_PCI=y CONFIG_VIRTIO_BALLOON=y CONFIG_VIRTIO_INPUT=y CONFIG_VIRTIO_MMIO=y +CONFIG_MAILBOX=y CONFIG_RPMSG_CHAR=y CONFIG_RPMSG_VIRTIO=y CONFIG_EXT4_FS=y