From patchwork Fri Apr 22 07:25:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12822881 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 895D1C4332F for ; Fri, 22 Apr 2022 07:26:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=+vtoPr4APFmdtotrsQ5JtZtpuckRwqaBHfK8IQeD8XI=; b=VAb+EPdVAyFl5n rGcZKYa/Pvy4RXn8pX1+ORgR62EFMrPpfathJGH81Edjl6Xhq/itL/dQZQLa/r/hAwvBpLeMCuE9v 6Tbn655H/ubzFe+rpJrRblClCr1L+Bl3O6jOANHDaMzqrsINbWtAoh54K5O25NpOIkfWwLzbgtB1F Sdecpze50RFpjK5/huSmqnKV2enE3LSqgev6DKoThR77+m+PZ8AkChapucxYY/PftsHOZn2R5RbEx uAl4MoK/GSapq+ttnQiLNrSlQ+D+u/b88bYRfspDjU6vT5kk/ksiqlsuaAdiTM979an8/z4EplQZN QBmBeKAdaTOLD7rbqvAQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nhngG-00GnC4-JB; Fri, 22 Apr 2022 07:26:16 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nhngA-00Gn7S-Oh for linux-riscv@lists.infradead.org; Fri, 22 Apr 2022 07:26:13 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1650612370; x=1682148370; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xA3N4B1Oq7NN/T+qdPN5HDE/pIMyStNJQREGSATatw4=; b=NSYq3DZY8H4GhGIfBRY9DUJ8o15vLy3QVGejWJLBu7MyTQ86j9r3jm2M jcHRDZ4E9KdgJaRmexNXv6HYcFDVwsM1nXEl9kZFJRSfPOSf7a60Q+WQb qwqBrG22gQVVWOPJyjTxIbrQRUalR43gnltKfg9ArrNCih7/V/S7HUNgM 2hKpfBRSxEG4MazBSBDQDLgLgIUNAGeb4UWawKweaIyoBs/EaMZMncZUI nWnpbfrhQ6Q8F1nTULStK9/qMOGnlSo3MdcwLvvcO2QKBImGP4B3gkj3r 20HtIRONPmFiZagy7vIUwRCEW8G5s2y86sq+G3nF4Uog+YnnMhaETzC1G Q==; X-IronPort-AV: E=Sophos;i="5.90,281,1643698800"; d="scan'208";a="170537731" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 22 Apr 2022 00:26:07 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Fri, 22 Apr 2022 00:26:07 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Fri, 22 Apr 2022 00:26:05 -0700 From: Conor Dooley To: Palmer Dabbelt CC: Paul Walmsley , Albert Ou , , , , , , Conor Dooley Subject: [PATCH v3 4/4] MAINTAINERS: add polarfire rng, pci and clock drivers Date: Fri, 22 Apr 2022 08:25:33 +0100 Message-ID: <20220422072533.2582084-5-conor.dooley@microchip.com> X-Mailer: git-send-email 2.35.2 In-Reply-To: <20220422072533.2582084-1-conor.dooley@microchip.com> References: <20220422072533.2582084-1-conor.dooley@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220422_002610_857641_CB085455 X-CRM114-Status: GOOD ( 10.79 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Hardware random, PCI and clock drivers for the PolarFire SoC have been upstreamed but are not covered by the MAINTAINERS entry, so add them. Daire is the author of the clock & PCI drivers, so add him as a maintainer in place of Lewis. Signed-off-by: Conor Dooley --- MAINTAINERS | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index fd768d43e048..d7602658b0a5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16939,12 +16939,15 @@ N: riscv K: riscv RISC-V/MICROCHIP POLARFIRE SOC SUPPORT -M: Lewis Hanly M: Conor Dooley +M: Daire McNamara L: linux-riscv@lists.infradead.org S: Supported F: arch/riscv/boot/dts/microchip/ +F: drivers/char/hw_random/mpfs-rng.c +F: drivers/clk/microchip/clk-mpfs.c F: drivers/mailbox/mailbox-mpfs.c +F: drivers/pci/controller/pcie-microchip-host.c F: drivers/soc/microchip/ F: include/soc/microchip/mpfs.h