| Message ID | 20220511201107.2311757-2-atishp@rivosinc.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] RISC-V: Fix counter restart during overflow for RV32 | expand |
On Thu, May 12, 2022 at 1:41 AM Atish Patra <atishp@rivosinc.com> wrote: > > Currently, riscv_pmu_event_set_period updates the userpage mapping. > However, the caller of riscv_pmu_event_set_period should update > the userpage mapping because the counter can not be updated/started > from set_period function in counter overflow path. > > Invoke the perf_event_update_userpage at the caller so that it > doesn't get invoked twice during counter start path. > > Fixes: f5bfa23f576f ("RISC-V: Add a perf core library for pmu drivers") > > Signed-off-by: Atish Patra <atishp@rivosinc.com> Looks good to me. Reviewed-by: Anup Patel <anup@brainfault.org> Regards, Anup > --- > drivers/perf/riscv_pmu.c | 1 - > drivers/perf/riscv_pmu_sbi.c | 1 + > 2 files changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/perf/riscv_pmu.c b/drivers/perf/riscv_pmu.c > index b2b8d2074ed0..130b9f1a40e0 100644 > --- a/drivers/perf/riscv_pmu.c > +++ b/drivers/perf/riscv_pmu.c > @@ -170,7 +170,6 @@ int riscv_pmu_event_set_period(struct perf_event *event) > left = (max_period >> 1); > > local64_set(&hwc->prev_count, (u64)-left); > - perf_event_update_userpage(event); > > return overflow; > } > diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c > index 24cea59612be..2eac5db2cc18 100644 > --- a/drivers/perf/riscv_pmu_sbi.c > +++ b/drivers/perf/riscv_pmu_sbi.c > @@ -527,6 +527,7 @@ static inline void pmu_sbi_start_overflow_mask(struct riscv_pmu *pmu, > init_val = local64_read(&hwc->prev_count) & max_period; > sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, idx, 1, > flag, init_val, init_val >> 32, 0); > + perf_event_update_userpage(event); > } > ctr_ovf_mask = ctr_ovf_mask >> 1; > idx++; > -- > 2.25.1 >
diff --git a/drivers/perf/riscv_pmu.c b/drivers/perf/riscv_pmu.c index b2b8d2074ed0..130b9f1a40e0 100644 --- a/drivers/perf/riscv_pmu.c +++ b/drivers/perf/riscv_pmu.c @@ -170,7 +170,6 @@ int riscv_pmu_event_set_period(struct perf_event *event) left = (max_period >> 1); local64_set(&hwc->prev_count, (u64)-left); - perf_event_update_userpage(event); return overflow; } diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c index 24cea59612be..2eac5db2cc18 100644 --- a/drivers/perf/riscv_pmu_sbi.c +++ b/drivers/perf/riscv_pmu_sbi.c @@ -527,6 +527,7 @@ static inline void pmu_sbi_start_overflow_mask(struct riscv_pmu *pmu, init_val = local64_read(&hwc->prev_count) & max_period; sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, idx, 1, flag, init_val, init_val >> 32, 0); + perf_event_update_userpage(event); } ctr_ovf_mask = ctr_ovf_mask >> 1; idx++;
Currently, riscv_pmu_event_set_period updates the userpage mapping. However, the caller of riscv_pmu_event_set_period should update the userpage mapping because the counter can not be updated/started from set_period function in counter overflow path. Invoke the perf_event_update_userpage at the caller so that it doesn't get invoked twice during counter start path. Fixes: f5bfa23f576f ("RISC-V: Add a perf core library for pmu drivers") Signed-off-by: Atish Patra <atishp@rivosinc.com> --- drivers/perf/riscv_pmu.c | 1 - drivers/perf/riscv_pmu_sbi.c | 1 + 2 files changed, 1 insertion(+), 1 deletion(-)