From patchwork Thu Jun 30 08:05:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12901369 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EC047C433EF for ; Thu, 30 Jun 2022 08:08:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=G55UyVoZTxJoYsRyRrY4bArcrkSSktNH1X+3FtGi+Uk=; b=rYo7Zl5nBZkIkw sZ4Fj3cift4XUtAbf6zLyvbsD1XPeT2afMiA4nuRpeLdfN43jStg2KUN3exXHyBLzwpN3cow/BThV ea5GbH/UNxiOaIR+9c1mxdGs+khVT7T0NWKTRhEVLhCcBJyyKCIRH5rdftg/nf1zlp2qH35Pyz234 x+lLbuzt9clWH7pjMrN+ZdaEwVWrjvoaL+WOPmR6ygDvqWo51o3AYYbh5LmksYeBOu/8z7keyhdLC N4TCKv3RSKb+qSQ/sjmFUODWl276BhG7P1KHTpmQPcap8ec4VGLI+g4DuXaenHuSB+Vh75JD2cNs2 otUbjILYqSbvPltW7D8A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o6pE6-00FvWw-0r; Thu, 30 Jun 2022 08:08:38 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o6pDn-00FvHU-Mh for linux-riscv@lists.infradead.org; Thu, 30 Jun 2022 08:08:21 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1656576500; x=1688112500; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mOqz3ip1cdUQ034f0OXKJbRL6450ByCAe2pveDLY79s=; b=FzFM2r14H5Q5Ez1KJ/l326Q7oWUCQNPIdiWaayQJvRH78bdmOPjqr+aG dogvAOxo3tNKsN1vKDz2h5/HOGbife+e0zt/zrP0KE3PHrcOwdmuuVPWl zl6GRiCaPrymucbRwjY0wLxjDAJUiLXl8Ydt5nVoJwjJ9KAVlaNhsoqYq R3X/badBLyFYtb6ne5gZvEvN2tCYm29FSC7zVluJye5xxjdEafqXSg52S MXcJpFbbZ32sR+rwkVWdT+Bc8uJKVBTAl3gYAkZJEuwYg2Iwuf1SPkaHj 0DMq1ddwyVrIqWe5OzekK4TNeech5yUwuud356pJn3DhELw7YGnrVts71 Q==; X-IronPort-AV: E=Sophos;i="5.92,233,1650956400"; d="scan'208";a="170217631" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Jun 2022 01:08:19 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Thu, 30 Jun 2022 01:08:18 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Thu, 30 Jun 2022 01:08:14 -0700 From: Conor Dooley To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Palmer Dabbelt , Conor Dooley , "Nicolas Ferre" , Claudiu Beznea , Philipp Zabel , "Daire McNamara" CC: Paul Walmsley , Albert Ou , , , , , Subject: [PATCH v1 12/14] clk: microchip: mpfs: delete 2 line mpfs_clk_register_foo() Date: Thu, 30 Jun 2022 09:05:31 +0100 Message-ID: <20220630080532.323731-13-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220630080532.323731-1-conor.dooley@microchip.com> References: <20220630080532.323731-1-conor.dooley@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220630_010819_849104_09EAF743 X-CRM114-Status: GOOD ( 11.24 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The register functions are now comprised of only a single operation each and no longer add anything to the driver. Delete them. Signed-off-by: Conor Dooley --- drivers/clk/microchip/clk-mpfs.c | 33 ++++++-------------------------- 1 file changed, 6 insertions(+), 27 deletions(-) diff --git a/drivers/clk/microchip/clk-mpfs.c b/drivers/clk/microchip/clk-mpfs.c index 0330c2839a24..e58d0bc4669a 100644 --- a/drivers/clk/microchip/clk-mpfs.c +++ b/drivers/clk/microchip/clk-mpfs.c @@ -203,14 +203,6 @@ static struct mpfs_msspll_hw_clock mpfs_msspll_clks[] = { MSSPLL_FBDIV_WIDTH, 0, REG_MSSPLL_SSCG_2_CR), }; -static int mpfs_clk_register_msspll(struct device *dev, struct mpfs_msspll_hw_clock *msspll_hw, - void __iomem *base) -{ - msspll_hw->base = base; - - return devm_clk_hw_register(dev, &msspll_hw->hw); -} - static int mpfs_clk_register_mssplls(struct device *dev, struct mpfs_msspll_hw_clock *msspll_hws, unsigned int num_clks, struct mpfs_clock_data *data) { @@ -220,7 +212,8 @@ static int mpfs_clk_register_mssplls(struct device *dev, struct mpfs_msspll_hw_c for (i = 0; i < num_clks; i++) { struct mpfs_msspll_hw_clock *msspll_hw = &msspll_hws[i]; - ret = mpfs_clk_register_msspll(dev, msspll_hw, data->msspll_base); + msspll_hw->base = data->msspll_base; + ret = devm_clk_hw_register(dev, &msspll_hw->hw); if (ret) return dev_err_probe(dev, ret, "failed to register msspll id: %d\n", CLK_MSSPLL); @@ -314,14 +307,6 @@ static struct mpfs_cfg_hw_clock mpfs_cfg_clks[] = { } }; -static int mpfs_clk_register_cfg(struct device *dev, struct mpfs_cfg_hw_clock *cfg_hw, - void __iomem *base) -{ - cfg_hw->cfg.reg = base + cfg_hw->reg_offset; - - return devm_clk_hw_register(dev, &cfg_hw->hw); -} - static int mpfs_clk_register_cfgs(struct device *dev, struct mpfs_cfg_hw_clock *cfg_hws, unsigned int num_clks, struct mpfs_clock_data *data) { @@ -331,7 +316,8 @@ static int mpfs_clk_register_cfgs(struct device *dev, struct mpfs_cfg_hw_clock * for (i = 0; i < num_clks; i++) { struct mpfs_cfg_hw_clock *cfg_hw = &cfg_hws[i]; - ret = mpfs_clk_register_cfg(dev, cfg_hw, data->base); + cfg_hw->cfg.reg = data->base + cfg_hw->reg_offset; + ret = devm_clk_hw_register(dev, &cfg_hw->hw); if (ret) return dev_err_probe(dev, ret, "failed to register clock id: %d\n", cfg_hw->id); @@ -453,14 +439,6 @@ static struct mpfs_periph_hw_clock mpfs_periph_clks[] = { CLK_PERIPH(CLK_CFM, "clk_periph_cfm", PARENT_CLK(AHB), 29, 0), }; -static int mpfs_clk_register_periph(struct device *dev, struct mpfs_periph_hw_clock *periph_hw, - void __iomem *base) -{ - periph_hw->periph.reg = base + REG_SUBBLK_CLOCK_CR; - - return devm_clk_hw_register(dev, &periph_hw->hw); -} - static int mpfs_clk_register_periphs(struct device *dev, struct mpfs_periph_hw_clock *periph_hws, int num_clks, struct mpfs_clock_data *data) { @@ -470,7 +448,8 @@ static int mpfs_clk_register_periphs(struct device *dev, struct mpfs_periph_hw_c for (i = 0; i < num_clks; i++) { struct mpfs_periph_hw_clock *periph_hw = &periph_hws[i]; - ret = mpfs_clk_register_periph(dev, periph_hw, data->base); + periph_hw->periph.reg = data->base + REG_SUBBLK_CLOCK_CR; + ret = devm_clk_hw_register(dev, &periph_hw->hw); if (ret) return dev_err_probe(dev, ret, "failed to register clock id: %d\n", periph_hw->id);