From patchwork Thu Jun 30 08:05:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12901332 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E9853CCA483 for ; Thu, 30 Jun 2022 08:07:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jx50g6VTSv9ZD1HwIvcRDXXoHRZhzwh6VxfzWZqZqJU=; b=YMrLzUQaCt8aaO 3VgyG1FwGi3qGrMc+DkRK/YpZIO62J/+MHTsNTsR3hYPPWR/4bzocIl+iBkgV1Wd+bRCv2CdbybKW VMk/t0cG426npGhqCkrcwfx7qYWgxCoi+llxEg4+cQzczJREHz+sZPzGMoKScQ7+ueTJm31TzxXnN 39Sv0ITD2ciATDuq/r0vO+ZK0+hrkV47eH65MT0b++/YZYA2mC5eXhCGxmECkudeXdy3LQm5tKjPl 1GoYfmqexWkXCIjC2a94ZAegC6udJIXXVT8q2kQJsck8iN0Q3o3p43CSJzRMPprsewVx0sh3TBlo4 +6hCu0v4OXm1ynoeddLw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o6pD7-00Fui8-Dt; Thu, 30 Jun 2022 08:07:37 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o6pD4-00Fug8-6W for linux-riscv@lists.infradead.org; Thu, 30 Jun 2022 08:07:36 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1656576454; x=1688112454; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NmlQ89jVF7aTtDCwBiYFJc6St825IpsKlpCn23IYam0=; b=DGqPrZkS6+2lxkJKHGyi6+cx0bElaTDjJRYw7De6yPoXajt2cfFMwsvy FeGt1GO715CSw33SSGsELy01KduenSjhiXrwehYcAWUyH5nq1fNne/sAc G9glQAxOHaX3bLeYx5nrvfeilI4AmIK2tZJ5AApajjunPS6xcZ93JmWYc F4HT9R/MuN5hpRMncCnySuIlKgC4nfSvg6UuWuRcRr+EXWWLeGtqydPMe Nok12yNhMcEW0WE1DoEPYic0UgsCZn3tSN+EBuNV7Njh406VPoPDlhk4Q 2tIEgx5X0K4UEtOGVFeBco2pfNUHWifvGfd1MuYhbqWn2PbKuViPVVu+W A==; X-IronPort-AV: E=Sophos;i="5.92,233,1650956400"; d="scan'208";a="170217484" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Jun 2022 01:07:31 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Thu, 30 Jun 2022 01:07:29 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Thu, 30 Jun 2022 01:07:25 -0700 From: Conor Dooley To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Palmer Dabbelt , Conor Dooley , "Nicolas Ferre" , Claudiu Beznea , Philipp Zabel , "Daire McNamara" CC: Paul Walmsley , Albert Ou , , , , , Subject: [PATCH v1 01/14] dt-bindings: clk: microchip: mpfs: add reset controller support Date: Thu, 30 Jun 2022 09:05:20 +0100 Message-ID: <20220630080532.323731-2-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220630080532.323731-1-conor.dooley@microchip.com> References: <20220630080532.323731-1-conor.dooley@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220630_010734_305034_8A161BAE X-CRM114-Status: GOOD ( 10.91 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The "peripheral" devices on PolarFire SoC can be put into reset, so update the device tree binding to reflect the presence of a reset controller. Signed-off-by: Conor Dooley Reviewed-by: Rob Herring --- .../bindings/clock/microchip,mpfs.yaml | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml index 016a4f378b9b..1d0b6a4fda42 100644 --- a/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml @@ -40,8 +40,21 @@ properties: const: 1 description: | The clock consumer should specify the desired clock by having the clock - ID in its "clocks" phandle cell. See include/dt-bindings/clock/microchip,mpfs-clock.h - for the full list of PolarFire clock IDs. + ID in its "clocks" phandle cell. + See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of + PolarFire clock IDs. + + resets: + maxItems: 1 + + '#reset-cells': + description: + The AHB/AXI peripherals on the PolarFire SoC have reset support, so from + CLK_ENVM to CLK_CFM. The reset consumer should specify the desired + peripheral via the clock ID in its "resets" phandle cell. + See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of + PolarFire clock IDs. + const: 1 required: - compatible