[RFC,4/4] riscv: Change rv32p34 to rv32p31 for svpbmt

Commit Message

Guo Ren July 5, 2022, 10:05 a.m. UTC

From: Guo Ren <[e-mail]>

Decrease rv32 16GB physical address range to 2GB (rv32p34 -> rv32p31)
for svpbmt support. Svpbmt & napot could directly occupy rv32 PPN
highest bits. The patch wouldn't reduce the functionality of rv32-Linux,
because rv32-Linux only supports 1GB direct mapping (0xc0000000 -
0xffffffff). So 2GB physical address range is enough for current
rv32-Linux (1GB for memory, 1GB for IO).

Signed-off-by: Guo Ren <[e-mail]>
Signed-off-by: Guo Ren <[e-mail]>
---
 arch/riscv/Kconfig                  | 2 +-
 arch/riscv/include/asm/pgtable-32.h | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

Patch

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 32ffef9f6e5b..0dc1509e7e1c 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -360,7 +360,7 @@  config RISCV_ISA_C
 
 config RISCV_ISA_SVPBMT
 	bool "SVPBMT extension support"
-	depends on 64BIT && MMU
+	depends on MMU
 	select RISCV_ALTERNATIVE
 	default y
 	help
diff --git a/arch/riscv/include/asm/pgtable-32.h b/arch/riscv/include/asm/pgtable-32.h
index 63b023bd4845..aa94f6487670 100644
--- a/arch/riscv/include/asm/pgtable-32.h
+++ b/arch/riscv/include/asm/pgtable-32.h
@@ -13,8 +13,8 @@ 
 #define PGDIR_SIZE      (_AC(1, UL) << PGDIR_SHIFT)
 #define PGDIR_MASK      (~(PGDIR_SIZE - 1))
 
-#define MAX_POSSIBLE_PHYSMEM_BITS 34
+#define MAX_POSSIBLE_PHYSMEM_BITS 31
 
-#define _PAGE_PFN_MASK  GENMASK(31, 10)
+#define _PAGE_PFN_MASK  GENMASK(28, 10)
 
 #endif /* _ASM_RISCV_PGTABLE_32_H */