diff mbox series

[2/3] riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable ADC/OPP/Thermal Zones/TSU

Message ID 20221115105135.1180490-3-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive)
State Accepted
Delegated to: Conor Dooley
Headers show
Series RZ/Five: Enable ADC/CANFD/I2C/OPP/Thermal Zones/TSU | expand

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Commit Message

Lad, Prabhakar Nov. 15, 2022, 10:51 a.m. UTC 
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Enable support for below blocks found on RZ/Five SMARC EVK SoC/SoM:
- ADC
- OPP
- Thermal Zones
- TSU

Note, these blocks are enabled in RZ/G2UL SMARC SoM DTSI [0] hence
deleting these disabled nodes from RZ/Five SMARC SoM DTSI enables them
here too as we include [0] in RZ/Five SMARC SoM DTSI.

[0] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/riscv/boot/dts/renesas/r9a07g043f.dtsi       |  2 ++
 arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi | 11 -----------
 2 files changed, 2 insertions(+), 11 deletions(-)

Comments

Geert Uytterhoeven Nov. 16, 2022, 9:03 a.m. UTC | #1 
Hi Prabhakar,

On Tue, Nov 15, 2022 at 11:51 AM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Enable support for below blocks found on RZ/Five SMARC EVK SoC/SoM:
> - ADC
> - OPP
> - Thermal Zones
> - TSU
>
> Note, these blocks are enabled in RZ/G2UL SMARC SoM DTSI [0] hence
> deleting these disabled nodes from RZ/Five SMARC SoM DTSI enables them
> here too as we include [0] in RZ/Five SMARC SoM DTSI.
>
> [0] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Thanks for your patch!

> --- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
> +++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
> @@ -16,13 +16,6 @@ aliases {
>         chosen {
>                 bootargs = "ignore_loglevel";
>         };
> -
> -       /delete-node/opp-table-0;
> -       /delete-node/thermal-zones;
> -};
> -
> -&adc {
> -       status = "disabled";

I believe this is not sufficient to enable the ADC, as it is disabled
by default?
So this needs to set the status to "okay" and configure pin
control, depending on SW_SW0_DEV_SEL, just like in
arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi?

The rest LGTM.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Geert Uytterhoeven Nov. 16, 2022, 9:06 a.m. UTC | #2 
Hi Prabhakar,

On Wed, Nov 16, 2022 at 10:03 AM Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Tue, Nov 15, 2022 at 11:51 AM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Enable support for below blocks found on RZ/Five SMARC EVK SoC/SoM:
> > - ADC
> > - OPP
> > - Thermal Zones
> > - TSU
> >
> > Note, these blocks are enabled in RZ/G2UL SMARC SoM DTSI [0] hence
> > deleting these disabled nodes from RZ/Five SMARC SoM DTSI enables them
> > here too as we include [0] in RZ/Five SMARC SoM DTSI.
> >
> > [0] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Thanks for your patch!
>
> > --- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
> > +++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
> > @@ -16,13 +16,6 @@ aliases {
> >         chosen {
> >                 bootargs = "ignore_loglevel";
> >         };
> > -
> > -       /delete-node/opp-table-0;
> > -       /delete-node/thermal-zones;
> > -};
> > -
> > -&adc {
> > -       status = "disabled";
>
> I believe this is not sufficient to enable the ADC, as it is disabled
> by default?
> So this needs to set the status to "okay" and configure pin
> control, depending on SW_SW0_DEV_SEL, just like in
> arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi?

Sorry, scrap that. grabbing my morning coffee *now*.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
diff mbox series

Patch

diff --git a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
index 50134be548f5..6ec1c6f9a403 100644
--- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
+++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
@@ -20,6 +20,7 @@  cpus {
 		cpu0: cpu@0 {
 			compatible = "andestech,ax45mp", "riscv";
 			device_type = "cpu";
+			#cooling-cells = <2>;
 			reg = <0x0>;
 			status = "okay";
 			riscv,isa = "rv64imafdc";
@@ -29,6 +30,7 @@  cpu0: cpu@0 {
 			d-cache-size = <0x8000>;
 			d-cache-line-size = <0x40>;
 			clocks = <&cpg CPG_CORE R9A07G043_CLK_I>;
+			operating-points-v2 = <&cluster0_opp>;
 
 			cpu0_intc: interrupt-controller {
 				#interrupt-cells = <1>;
diff --git a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
index 45a182fa3b4b..2b7672bc4b52 100644
--- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
+++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
@@ -16,13 +16,6 @@  aliases {
 	chosen {
 		bootargs = "ignore_loglevel";
 	};
-
-	/delete-node/opp-table-0;
-	/delete-node/thermal-zones;
-};
-
-&adc {
-	status = "disabled";
 };
 
 &dmac {
@@ -49,10 +42,6 @@  &sdhi0 {
 	status = "disabled";
 };
 
-&tsu {
-	status = "disabled";
-};
-
 &wdt0 {
 	status = "disabled";
 };