From patchwork Thu Dec 8 02:58:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 13067848 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DC032C4708D for ; Thu, 8 Dec 2022 03:00:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rG8RTIluHNe3J0RQ1P2HL3WdxPKRkN/8YD/Grqwxec4=; b=yJ1Gv4wb22lOm8 U8nWvqvPnA86r3SKfkM7eUSnG5RxH4VRCH1+o9F9GPsf8jXqXtx3ZG6vNCQNmv7eFXOx0GAAkw/GT bvrw3Y5VJGlwlNaKX5EXSbS0CCKkV7NCCvO5+PxCMZ9OukKMQvLYeonx/SlICoXnKXscCV0d75prD 4/kakt0pwwlG5kkTyMRWVLGLo1LHitpjgK4P2l7KRWrA2Fq/bQbn2Zhk9MXX8cG1rftnfu6MlTzdx rqQUnSa6oGT1CZ3RbjWLDiyd2M5k++Fls0aEdEtB/AUm01+uI6mgrIphgaqN7Aoe24UaYzc5cdKJY RpgNpXmCu2wwQhZfqNBw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1p378l-000dAs-Ev; Thu, 08 Dec 2022 03:00:03 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1p378i-000d74-2o for linux-riscv@lists.infradead.org; Thu, 08 Dec 2022 03:00:01 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 99E6761B8D; Thu, 8 Dec 2022 02:59:59 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 16D81C433C1; Thu, 8 Dec 2022 02:59:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1670468399; bh=3IetF2nWiuqWrmJzZRHUegf4CntQjsLrssH40yo9Hag=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qosLDF6VMM+RVEsUpMNyRgm1TM4Tllz7ip3fgTwihhXKjlQHtRSehIoD5c+d3T/TL HkOU+kPL6LnnrkklCBwnO56c1rM5Mp88AId+7SGLyoX8EMXY+QPWCBTiuVGTAC+O3D B/yVk8FiGNq+fr7rdUhkeH/ALZKzQbiIsCOiDgAkbTOVAL2r/QaeoQzuwQ2BqhB+iW AFtk+As/5p0pIeip5Mmp2bUW5znGezA5m9auUcGacOaad/cNsv6X17A/HlIA9PmMeP lvRkh7Ctg32CG+fGcpLcudFwNJRdfLFdF6AYIEXamKdseB14D8ReJ5DpwQ8OlVTxWw OFTVELXHta/Pg== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, palmer@dabbelt.com, paul.walmsley@sifive.com, mark.rutland@arm.com, zouyipeng@huawei.com, bigeasy@linutronix.de, David.Laight@aculab.com, chenzhongjin@huawei.com, greentime.hu@sifive.com, andy.chiu@sifive.com, ben@decadent.org.uk, bjorn@kernel.org Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren Subject: [PATCH -next V10 09/10] riscv: stack: Support HAVE_SOFTIRQ_ON_OWN_STACK Date: Wed, 7 Dec 2022 21:58:15 -0500 Message-Id: <20221208025816.138712-10-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221208025816.138712-1-guoren@kernel.org> References: <20221208025816.138712-1-guoren@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221207_190000_255901_0B14A377 X-CRM114-Status: GOOD ( 13.52 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Guo Ren Add the HAVE_SOFTIRQ_ON_OWN_STACK feature for the IRQ_STACKS config. The irq and softirq use the same independent irq_stack of percpu by time division multiplexing. Tested-by: Jisheng Zhang Signed-off-by: Guo Ren Signed-off-by: Guo Ren --- arch/riscv/Kconfig | 7 ++++--- arch/riscv/kernel/irq.c | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 37 insertions(+), 3 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 0a9d4bdc0338..bd4c4ae4cdc9 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -447,12 +447,13 @@ config FPU If you don't know what to do here, say Y. config IRQ_STACKS - bool "Independent irq stacks" if EXPERT + bool "Independent irq & softirq stacks" if EXPERT default y select HAVE_IRQ_EXIT_ON_IRQ_STACK + select HAVE_SOFTIRQ_ON_OWN_STACK help - Add independent irq stacks for percpu to prevent kernel stack overflows. - We may save some memory footprint by disabling IRQ_STACKS. + Add independent irq & softirq stacks for percpu to prevent kernel stack + overflows. We may save some memory footprint by disabling IRQ_STACKS. endmenu # "Platform type" diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c index 5d77f692b198..a6406da34937 100644 --- a/arch/riscv/kernel/irq.c +++ b/arch/riscv/kernel/irq.c @@ -11,6 +11,7 @@ #include #include #include +#include #ifdef CONFIG_IRQ_STACKS static DEFINE_PER_CPU(ulong *, irq_stack_ptr); @@ -38,6 +39,38 @@ static void init_irq_stacks(void) per_cpu(irq_stack_ptr, cpu) = per_cpu(irq_stack, cpu); } #endif /* CONFIG_VMAP_STACK */ + +#ifdef CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK +void do_softirq_own_stack(void) +{ +#ifdef CONFIG_IRQ_STACKS + if (on_thread_stack()) { + ulong *sp = per_cpu(irq_stack_ptr, smp_processor_id()) + + IRQ_STACK_SIZE/sizeof(ulong); + __asm__ __volatile( + "addi sp, sp, -"RISCV_SZPTR "\n" + REG_S" ra, (sp) \n" + "addi sp, sp, -"RISCV_SZPTR "\n" + REG_S" s0, (sp) \n" + "addi s0, sp, 2*"RISCV_SZPTR "\n" + "move sp, %[sp] \n" + "call __do_softirq \n" + "addi sp, s0, -2*"RISCV_SZPTR"\n" + REG_L" s0, (sp) \n" + "addi sp, sp, "RISCV_SZPTR "\n" + REG_L" ra, (sp) \n" + "addi sp, sp, "RISCV_SZPTR "\n" + : + : [sp] "r" (sp) + : "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", + "t0", "t1", "t2", "t3", "t4", "t5", "t6", + "memory"); + } else +#endif + __do_softirq(); +} +#endif /* CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK */ + #else static void init_irq_stacks(void) {} #endif /* CONFIG_IRQ_STACKS */