From patchwork Wed Jan 11 12:53:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daire McNamara X-Patchwork-Id: 13096610 X-Patchwork-Delegate: mail@conchuod.ie Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AA6DDC54EBC for ; Wed, 11 Jan 2023 12:54:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=09S1C1T0WDPXq5G8j3MR/eFeL5MD1j8A77oYOSjS8dA=; b=kuJ6b/MJEP58sy 4HrPqTkqp4cydBb/4hlX6BXVqpnvbfXeNfiGguQFsYtLcI2tdtMfL0Wet94E7qOMTqbWJvnQ/ECmX ye2ix5tZ4j3ms2VZL38I5aJN23c++1V523JsqEH4p3Hx55R8I6dwvTBj+WirlKGDF52B6Mtbe+n/x QAJF5sQArZ/Em5T5SIUkVxucbCiosHNxn/k3v9briSi3x56htA4Jmm4+oVYHYBJTCYHX/UkuHWk8i /zEVjKUTUdD+Z7CXUZaeQx17f2dJOk4nfCkXGC4GBu7FOQ3Beljp5RzUqf/UXqpQ7A5mBQe20OzSH ZnSLPqyric6xfQh/ZePA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pFacR-00BNGA-NR; Wed, 11 Jan 2023 12:54:15 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pFacG-00BN7V-8A for linux-riscv@lists.infradead.org; Wed, 11 Jan 2023 12:54:05 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1673441645; x=1704977645; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2JheLyRTgEp/3V42HChIgGKvaXCBJQLuWjCkgE/1vaY=; b=UZ1OMoUGQTVqHx7WxA0XaOuCi0fUjNO/9VfitK+WgWslMeWTSvCRUrWt cgg/HeF3ksH5sMR+E8f3bFZOORQnA51OqnOhpss3wG+8ak4w/8g/othDe 12gGp0UJ+maMSriqF/NHQ9MkbT1N87YHuChnAIRYPV1IL84opNl+PiHIE icLNQQYOTCJCVyTfM7v8NcHMisk29/evGkRqhTbgrqVHj9dedzB156r38 blXUI3HVhDf3vC3SnDKRK1BIjpJr6oWxMOxWApihdHdP67S0ZE7XU3xCZ +EndvinoWdRTb2hlreviicrLQKD9wcfhz68dK3vrARWhiE8F2Owg+151B w==; X-IronPort-AV: E=Sophos;i="5.96,317,1665471600"; d="scan'208";a="196330619" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 11 Jan 2023 05:54:04 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Wed, 11 Jan 2023 05:54:01 -0700 Received: from daire-X570.amer.actel.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Wed, 11 Jan 2023 05:53:59 -0700 From: To: , , , , , , , , , , , CC: Daire McNamara Subject: [PATCH v3 11/11] riscv: dts: microchip: add parent ranges and dma-ranges for IKRD v2022.09 Date: Wed, 11 Jan 2023 12:53:23 +0000 Message-ID: <20230111125323.1911373-12-daire.mcnamara@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230111125323.1911373-1-daire.mcnamara@microchip.com> References: <20230111125323.1911373-1-daire.mcnamara@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230111_045404_328003_338931AB X-CRM114-Status: UNSURE ( 9.69 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Conor Dooley we have replaced the "microchip,matro0" hack property with what was suggested by Rob - create a parent bus and use ranges and dma-ranges in the parent bus and pcie device to achieve the address translations we need. Add the appropriate ranges and dma-ranges for the v2022.09 IKRD so that it remains functional. Signed-off-by: Conor Dooley Signed-off-by: Daire McNamara --- .../dts/microchip/mpfs-icicle-kit-fabric.dtsi | 62 +++++++++++-------- 1 file changed, 35 insertions(+), 27 deletions(-) diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi index 1069134f2e12..51ce87e70b33 100644 --- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi @@ -26,33 +26,41 @@ i2c2: i2c@40000200 { status = "disabled"; }; - pcie: pcie@3000000000 { - compatible = "microchip,pcie-host-1.0"; - #address-cells = <0x3>; - #interrupt-cells = <0x1>; - #size-cells = <0x2>; - device_type = "pci"; - reg = <0x30 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>; - reg-names = "cfg", "apb"; - bus-range = <0x0 0x7f>; - interrupt-parent = <&plic>; - interrupts = <119>; - interrupt-map = <0 0 0 1 &pcie_intc 0>, - <0 0 0 2 &pcie_intc 1>, - <0 0 0 3 &pcie_intc 2>, - <0 0 0 4 &pcie_intc 3>; - interrupt-map-mask = <0 0 0 7>; - clocks = <&ccc_nw CLK_CCC_PLL0_OUT1>, <&ccc_nw CLK_CCC_PLL0_OUT3>; - clock-names = "fic1", "fic3"; - ranges = <0x3000000 0x0 0x8000000 0x30 0x8000000 0x0 0x80000000>; - dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x1 0x00000000>; - msi-parent = <&pcie>; - msi-controller; - status = "disabled"; - pcie_intc: interrupt-controller { - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; + fabric-pcie-bus { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x40000000 0x0 0x40000000 0x0 0x20000000>, + <0x30 0x0 0x30 0x0 0x10 0x0>; + dma-ranges = <0x0 0x0 0x10 0x0 0x0 0x80000000>; + pcie: pcie@3000000000 { + compatible = "microchip,pcie-host-1.0"; + #address-cells = <0x3>; + #interrupt-cells = <0x1>; + #size-cells = <0x2>; + device_type = "pci"; + reg = <0x30 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>; + reg-names = "cfg", "apb"; + bus-range = <0x0 0x7f>; + interrupt-parent = <&plic>; + interrupts = <119>; + interrupt-map = <0 0 0 1 &pcie_intc 0>, + <0 0 0 2 &pcie_intc 1>, + <0 0 0 3 &pcie_intc 2>, + <0 0 0 4 &pcie_intc 3>; + interrupt-map-mask = <0 0 0 7>; + clocks = <&ccc_nw CLK_CCC_PLL0_OUT1>, <&ccc_nw CLK_CCC_PLL0_OUT3>; + clock-names = "fic1", "fic3"; + ranges = <0x3000000 0x0 0x8000000 0x30 0x8000000 0x0 0x80000000>; + dma-ranges = <0x3000000 0x10 0x0 0x0 0x0 0x0 0x80000000>; + msi-parent = <&pcie>; + msi-controller; + status = "disabled"; + pcie_intc: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + }; }; };