| Message ID | 20230323123924.3032174-1-suagrfillet@gmail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | c4b52d8b6c1de1e6359bef2d1394d5917940b3dc |
| Headers | show |
| Series | [V2] riscv: export cpu/freq invariant to scheduler | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/cover_letter | success | Single patches do not need cover letters |
| conchuod/tree_selection | success | Guessed tree name to be for-next |
| conchuod/fixes_present | success | Fixes tag not required for -next series |
| conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 1 and now 1 |
| conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
| conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/build_rv64_clang_allmodconfig | fail | Errors and warnings before: 18 this patch: 2309 |
| conchuod/module_param | success | Was 0 now: 0 |
| conchuod/build_rv64_gcc_allmodconfig | fail | Errors and warnings before: 18 this patch: 17774 |
| conchuod/build_rv32_defconfig | success | Build OK |
| conchuod/dtb_warn_rv64 | success | Errors and warnings before: 3 this patch: 3 |
| conchuod/header_inline | success | No static functions without inline keyword in header files |
| conchuod/checkpatch | warning | WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? |
| conchuod/source_inline | success | Was 0 now: 0 |
| conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
| conchuod/verify_fixes | success | No Fixes tag |
| conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
On Thu, Mar 23, 2023 at 08:39:24PM +0800, Song Shuai wrote: > RISC-V now manages CPU topology using arch_topology which provides > CPU capacity and frequency related interfaces to access the cpu/freq > invariant in possible heterogeneous or DVFS-enabled platforms. > > Here adds topology.h file to export the arch_topology interfaces for > replacing the scheduler's constant-based cpu/freq invariant accounting. > > Signed-off-by: Song Shuai <suagrfillet@gmail.com> > --- > changes from V1: > - fix the leading underscore and tidy the patch up > --- > arch/riscv/include/asm/topology.h | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > create mode 100644 arch/riscv/include/asm/topology.h > > diff --git a/arch/riscv/include/asm/topology.h b/arch/riscv/include/asm/topology.h > new file mode 100644 > index 000000000000..727e8d163a3b > --- /dev/null > +++ b/arch/riscv/include/asm/topology.h > @@ -0,0 +1,20 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +#ifndef _ASM_RISCV_TOPOLOGY_H > +#define _ASM_RISCV_TOPOLOGY_H > + > +#include <linux/arch_topology.h> > + > +/* Replace task scheduler's default frequency-invariant accounting */ > +#define arch_scale_freq_tick topology_scale_freq_tick > +#define arch_set_freq_scale topology_set_freq_scale I was thinking all the right hand side would line up, which means the above two need additional tabs and so does topology_get_cpu_scale. > +#define arch_scale_freq_capacity topology_get_freq_scale > +#define arch_scale_freq_invariant topology_scale_freq_invariant > + > +/* Replace task scheduler's default cpu-invariant accounting */ > +#define arch_scale_cpu_capacity topology_get_cpu_scale > + > +/* Enable topology flag updates */ > +#define arch_update_cpu_topology topology_update_cpu_topology > + > +#include <asm-generic/topology.h> I'd also prefer a blank line here. > +#endif /* _ASM_RISCV_TOPOLOGY_H */ > -- > 2.20.1 > Otherwise, Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Thanks, drew
On Fri, Mar 24, 2023 at 1:52 AM Andrew Jones <ajones@ventanamicro.com> wrote: > > On Thu, Mar 23, 2023 at 08:39:24PM +0800, Song Shuai wrote: > > RISC-V now manages CPU topology using arch_topology which provides > > CPU capacity and frequency related interfaces to access the cpu/freq > > invariant in possible heterogeneous or DVFS-enabled platforms. > > > > Here adds topology.h file to export the arch_topology interfaces for > > replacing the scheduler's constant-based cpu/freq invariant accounting. > > > > Signed-off-by: Song Shuai <suagrfillet@gmail.com> Thanks for submitting this. Reviewed-by: Ley Foon Tan <lftan@kernel.org> Regards Ley Foon
+CC Bjorn, On Thu, Mar 23, 2023 at 08:39:24PM +0800, Song Shuai wrote: > RISC-V now manages CPU topology using arch_topology which provides > CPU capacity and frequency related interfaces to access the cpu/freq > invariant in possible heterogeneous or DVFS-enabled platforms. > > Here adds topology.h file to export the arch_topology interfaces for > replacing the scheduler's constant-based cpu/freq invariant accounting. > > Signed-off-by: Song Shuai <suagrfillet@gmail.com> Something in CI really, really doesn't like this patch: https://patchwork.kernel.org/project/linux-riscv/patch/20230323123924.3032174-1-suagrfillet@gmail.com/ The CI stuff applies the patch, builds the tree, resets to HEAD~1, builds it again, goes back to the applied patch and builds a third time. Builds 2 and 3 are incremental. In theory the same stuff should change between applying and removing the patch, and therefore each of builds 2 and 3 should have the same coverage, but that doesn't seem to be happening here. Build 2 looks to have rebuilt almost nothing and build 3 has rebuilt the world. I'm gonna chalk that one down as a CI issue rather than your patch! That said, I was wondering if you would end up submitting this patch, given the discussion on your last one ;) Looks to be the same as was done for arm64, so fwiw: Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Thanks, Conor. > --- > changes from V1: > - fix the leading underscore and tidy the patch up > --- > arch/riscv/include/asm/topology.h | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > create mode 100644 arch/riscv/include/asm/topology.h > > diff --git a/arch/riscv/include/asm/topology.h b/arch/riscv/include/asm/topology.h > new file mode 100644 > index 000000000000..727e8d163a3b > --- /dev/null > +++ b/arch/riscv/include/asm/topology.h > @@ -0,0 +1,20 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +#ifndef _ASM_RISCV_TOPOLOGY_H > +#define _ASM_RISCV_TOPOLOGY_H > + > +#include <linux/arch_topology.h> > + > +/* Replace task scheduler's default frequency-invariant accounting */ > +#define arch_scale_freq_tick topology_scale_freq_tick > +#define arch_set_freq_scale topology_set_freq_scale > +#define arch_scale_freq_capacity topology_get_freq_scale > +#define arch_scale_freq_invariant topology_scale_freq_invariant > + > +/* Replace task scheduler's default cpu-invariant accounting */ > +#define arch_scale_cpu_capacity topology_get_cpu_scale > + > +/* Enable topology flag updates */ > +#define arch_update_cpu_topology topology_update_cpu_topology > + > +#include <asm-generic/topology.h> > +#endif /* _ASM_RISCV_TOPOLOGY_H */ > -- > 2.20.1 > >
On Thu, 23 Mar 2023 20:39:24 +0800, Song Shuai wrote: > RISC-V now manages CPU topology using arch_topology which provides > CPU capacity and frequency related interfaces to access the cpu/freq > invariant in possible heterogeneous or DVFS-enabled platforms. > > Here adds topology.h file to export the arch_topology interfaces for > replacing the scheduler's constant-based cpu/freq invariant accounting. > > [...] Applied, thanks! [1/1] riscv: export cpu/freq invariant to scheduler https://git.kernel.org/palmer/c/c4b52d8b6c1d Best regards,
On Thu, 23 Mar 2023 10:24:03 PDT (-0700), ajones@ventanamicro.com wrote: > On Thu, Mar 23, 2023 at 08:39:24PM +0800, Song Shuai wrote: >> RISC-V now manages CPU topology using arch_topology which provides >> CPU capacity and frequency related interfaces to access the cpu/freq >> invariant in possible heterogeneous or DVFS-enabled platforms. >> >> Here adds topology.h file to export the arch_topology interfaces for >> replacing the scheduler's constant-based cpu/freq invariant accounting. >> >> Signed-off-by: Song Shuai <suagrfillet@gmail.com> >> --- >> changes from V1: >> - fix the leading underscore and tidy the patch up >> --- >> arch/riscv/include/asm/topology.h | 20 ++++++++++++++++++++ >> 1 file changed, 20 insertions(+) >> create mode 100644 arch/riscv/include/asm/topology.h >> >> diff --git a/arch/riscv/include/asm/topology.h b/arch/riscv/include/asm/topology.h >> new file mode 100644 >> index 000000000000..727e8d163a3b >> --- /dev/null >> +++ b/arch/riscv/include/asm/topology.h >> @@ -0,0 +1,20 @@ >> +/* SPDX-License-Identifier: GPL-2.0 */ >> +#ifndef _ASM_RISCV_TOPOLOGY_H >> +#define _ASM_RISCV_TOPOLOGY_H >> + >> +#include <linux/arch_topology.h> >> + >> +/* Replace task scheduler's default frequency-invariant accounting */ >> +#define arch_scale_freq_tick topology_scale_freq_tick >> +#define arch_set_freq_scale topology_set_freq_scale > > I was thinking all the right hand side would line up, which means > the above two need additional tabs and so does topology_get_cpu_scale. I don't see a respin, but given that the feedback in just whitespace changes I've got and picked this up while fixing the whitespace. > >> +#define arch_scale_freq_capacity topology_get_freq_scale >> +#define arch_scale_freq_invariant topology_scale_freq_invariant >> + >> +/* Replace task scheduler's default cpu-invariant accounting */ >> +#define arch_scale_cpu_capacity topology_get_cpu_scale >> + >> +/* Enable topology flag updates */ >> +#define arch_update_cpu_topology topology_update_cpu_topology >> + >> +#include <asm-generic/topology.h> > > I'd also prefer a blank line here. > >> +#endif /* _ASM_RISCV_TOPOLOGY_H */ >> -- >> 2.20.1 >> > > Otherwise, > > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> > > Thanks, > drew
Hello: This patch was applied to riscv/linux.git (for-next) by Palmer Dabbelt <palmer@rivosinc.com>: On Thu, 23 Mar 2023 20:39:24 +0800 you wrote: > RISC-V now manages CPU topology using arch_topology which provides > CPU capacity and frequency related interfaces to access the cpu/freq > invariant in possible heterogeneous or DVFS-enabled platforms. > > Here adds topology.h file to export the arch_topology interfaces for > replacing the scheduler's constant-based cpu/freq invariant accounting. > > [...] Here is the summary with links: - [V2] riscv: export cpu/freq invariant to scheduler https://git.kernel.org/riscv/c/c4b52d8b6c1d You are awesome, thank you!
diff --git a/arch/riscv/include/asm/topology.h b/arch/riscv/include/asm/topology.h new file mode 100644 index 000000000000..727e8d163a3b --- /dev/null +++ b/arch/riscv/include/asm/topology.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _ASM_RISCV_TOPOLOGY_H +#define _ASM_RISCV_TOPOLOGY_H + +#include <linux/arch_topology.h> + +/* Replace task scheduler's default frequency-invariant accounting */ +#define arch_scale_freq_tick topology_scale_freq_tick +#define arch_set_freq_scale topology_set_freq_scale +#define arch_scale_freq_capacity topology_get_freq_scale +#define arch_scale_freq_invariant topology_scale_freq_invariant + +/* Replace task scheduler's default cpu-invariant accounting */ +#define arch_scale_cpu_capacity topology_get_cpu_scale + +/* Enable topology flag updates */ +#define arch_update_cpu_topology topology_update_cpu_topology + +#include <asm-generic/topology.h> +#endif /* _ASM_RISCV_TOPOLOGY_H */
RISC-V now manages CPU topology using arch_topology which provides CPU capacity and frequency related interfaces to access the cpu/freq invariant in possible heterogeneous or DVFS-enabled platforms. Here adds topology.h file to export the arch_topology interfaces for replacing the scheduler's constant-based cpu/freq invariant accounting. Signed-off-by: Song Shuai <suagrfillet@gmail.com> --- changes from V1: - fix the leading underscore and tidy the patch up --- arch/riscv/include/asm/topology.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 arch/riscv/include/asm/topology.h