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Wed, 19 Apr 2023 04:10:30 -0700 (PDT) Received: from x1.hsd1.or.comcast.net ([2601:1c2:1800:f680:eaf2:1d7a:7338:16cb]) by smtp.gmail.com with ESMTPSA id g12-20020a1709026b4c00b001a24cded097sm11180774plt.236.2023.04.19.04.10.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Apr 2023 04:10:29 -0700 (PDT) From: Drew Fustini To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Palmer Dabbelt , Paul Walmsley , Conor Dooley , Ved Shanbhogue , =?utf-8?q?Kornel_Dul=C4=99ba?= , Adrien Ricciardi , Nicolas Pitre , Fenghua Yu , Reinette Chatre , Babu Moger , Peter Newman , x86@kernel.org, Rob Herring , James Morse Cc: Drew Fustini Subject: [RFC PATCH 14/21] DO_NOT_MERGE dt-bindings: soc: add Foobar SoC cache controller Date: Wed, 19 Apr 2023 04:11:04 -0700 Message-Id: <20230419111111.477118-15-dfustini@baylibre.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230419111111.477118-1-dfustini@baylibre.com> References: <20230419111111.477118-1-dfustini@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230419_041033_697865_4C2EE228 X-CRM114-Status: GOOD ( 12.36 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add bindings for an example SoC cache controller that implements CBQRI. Co-developed-by: Adrien Ricciardi Signed-off-by: Adrien Ricciardi Signed-off-by: Drew Fustini --- .../soc/foobar/foobar,cache-controller.yaml | 51 +++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/foobar/foobar,cache-controller.yaml diff --git a/Documentation/devicetree/bindings/soc/foobar/foobar,cache-controller.yaml b/Documentation/devicetree/bindings/soc/foobar/foobar,cache-controller.yaml new file mode 100644 index 000000000000..6348483bbe09 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/foobar/foobar,cache-controller.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/foobar/foobar,cache-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Foobar SoC Cache Controller + +maintainers: + - Drew Fustini + +description: + Foobar SoC cache controller implements the RISC-V CBQRI interface for + capacity allocaiton and usage monitoring. + +allOf: + - $ref: /schemas/cache-controller.yaml# + - $ref: /schemas/riscv/riscv,cbqri.yaml# + +properties: + compatible: + items: + - const: foobar,cache-controller + reg: + maxItems: 1 + description: A memory region containing registers as defined in CBQRI spec + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + + cache-controller@fff12000 { + compatible = "foobar,cache-controller"; + reg = <0xfff12000 0x2000>; + cache-level = <2>; + riscv,cbqri-rcid = <64>; + riscv,cbqri-mcid = <256>; + }; + +...