[RFC,08/21] RISC-V: QoS: expose implementation to resctrl

Message ID	20230419111111.477118-9-dfustini@baylibre.com (mailing list archive)
State	Awaiting Upstream, archived
Headers	show Return-Path: <linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org> From: Drew Fustini <dfustini@baylibre.com> To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Conor Dooley <conor.dooley@microchip.com>, Ved Shanbhogue <ved@rivosinc.com>, =?utf-8?q?Kornel_Dul=C4=99ba?= <mindal@semihalf.com>, Adrien Ricciardi <aricciardi@baylibre.com>, Nicolas Pitre <npitre@baylibre.com>, Fenghua Yu <fenghua.yu@intel.com>, Reinette Chatre <reinette.chatre@intel.com>, Babu Moger <babu.moger@amd.com>, Peter Newman <peternewman@google.com>, x86@kernel.org, Rob Herring <robh+dt@kernel.org>, James Morse <james.morse@arm.com> Cc: Drew Fustini <dfustini@baylibre.com> Subject: [RFC PATCH 08/21] RISC-V: QoS: expose implementation to resctrl Date: Wed, 19 Apr 2023 04:10:58 -0700 Message-Id: <20230419111111.477118-9-dfustini@baylibre.com> In-Reply-To: <20230419111111.477118-1-dfustini@baylibre.com> References: <20230419111111.477118-1-dfustini@baylibre.com> MIME-Version: 1.0 Precedence: list Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org
Series	RISC-V: QoS: add CBQRI resctrl interface \| expand [RFC,00/21] RISC-V: QoS: add CBQRI resctrl interface [RFC,01/21] RISC-V: Detect the Ssqosid extension [RFC,02/21] RISC-V: Add support for sqoscfg CSR [RFC,03/21] RISC-V: QoS: define properties of CBQRI controllers [RFC,04/21] RISC-V: QoS: define CBQRI capacity and bandwidth capabilities [RFC,05/21] RISC-V: QoS: define prototypes for resctrl interface [RFC,06/21] RISC-V: QoS: define CBQRI resctrl resources and domains [RFC,07/21] RISC-V: QoS: add resctrl interface for CBQRI controllers [RFC,08/21] RISC-V: QoS: expose implementation to resctrl [RFC,09/21] RISC-V: QoS: add late_initcall to setup resctrl interface [RFC,10/21] RISC-V: QoS: make CONFIG_RISCV_ISA_SSQOSID select resctrl [RFC,11/21] RISC-V: QoS: add to build when CONFIG_RISCV_ISA_SSQOSID set [RFC,12/21] dt-bindings: riscv: add riscv,cbqri bindings [RFC,13/21] DO_NOT_MERGE dt-bindings: add foobar vendor-prefix [RFC,14/21] DO_NOT_MERGE dt-bindings: soc: add Foobar SoC cache controller [RFC,15/21] DO_NOT_MERGE dt-bindings: soc: add Foobar SoC memory controller [RFC,16/21] DO_NOT_MERGE soc: add Foobar SoC cache controller driver [RFC,17/21] DO_NOT_MERGE soc: add Foobar SoC memory controller driver [RFC,18/21] DO_NOT_MERGE soc: build Foobar SoC drivers [RFC,19/21] DO_NOT_MERGE riscv: dts: qemu: add dump from riscv-cbqri-rfc [RFC,20/21] DO_NOT_MERGE riscv: dts: qemu: add cbqri-capable controllers [RFC,21/21] DO_NOT_MERGE riscv: dts: build qemu virt device tree

Message ID

20230419111111.477118-9-dfustini@baylibre.com (mailing list archive)

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Awaiting Upstream, archived

Headers

From: Drew Fustini <dfustini@baylibre.com>
To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
 Palmer Dabbelt <palmer@dabbelt.com>,
 Paul Walmsley <paul.walmsley@sifive.com>,
 Conor Dooley <conor.dooley@microchip.com>, Ved Shanbhogue <ved@rivosinc.com>,
	=?utf-8?q?Kornel_Dul=C4=99ba?= <mindal@semihalf.com>,
 Adrien Ricciardi <aricciardi@baylibre.com>,
 Nicolas Pitre <npitre@baylibre.com>, Fenghua Yu <fenghua.yu@intel.com>,
 Reinette Chatre <reinette.chatre@intel.com>, Babu Moger <babu.moger@amd.com>,
 Peter Newman <peternewman@google.com>, x86@kernel.org,
 Rob Herring <robh+dt@kernel.org>, James Morse <james.morse@arm.com>
Cc: Drew Fustini <dfustini@baylibre.com>
Subject: [RFC PATCH 08/21] RISC-V: QoS: expose implementation to resctrl
Date: Wed, 19 Apr 2023 04:10:58 -0700
Message-Id: <20230419111111.477118-9-dfustini@baylibre.com>
In-Reply-To: <20230419111111.477118-1-dfustini@baylibre.com>
References: <20230419111111.477118-1-dfustini@baylibre.com>
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Series

RISC-V: QoS: add CBQRI resctrl interface | expand

Context	Check	Description
conchuod/tree_selection	fail	Failed to apply to next/pending-fixes or riscv/for-next

Context

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Description

conchuod/tree_selection

fail

Failed to apply to next/pending-fixes or riscv/for-next

Commit Message

Drew Fustini April 19, 2023, 11:10 a.m. UTC

The generic resctrl header include/linux/resctrl.h includes
asm/resctrl.h when CONFIG_ARCH_HAS_CPU_RESCTRL is set.

Co-developed-by: Adrien Ricciardi <aricciardi@baylibre.com>
Signed-off-by: Adrien Ricciardi <aricciardi@baylibre.com>
Signed-off-by: Drew Fustini <dfustini@baylibre.com>
---
 arch/riscv/include/asm/resctrl.h | 2 ++
 1 file changed, 2 insertions(+)
 create mode 100644 arch/riscv/include/asm/resctrl.h

diff --git a/arch/riscv/include/asm/resctrl.h b/arch/riscv/include/asm/resctrl.h
new file mode 100644
index 000000000000..7d247d87dab9
--- /dev/null
+++ b/arch/riscv/include/asm/resctrl.h
@@ -0,0 +1,2 @@ 
+/* SPDX-License-Identifier: GPL-2.0-only */
+#include <linux/riscv_qos.h>

[RFC,08/21] RISC-V: QoS: expose implementation to resctrl

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