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Wed, 19 Apr 2023 15:24:11 -0700 (PDT) Received: from atishp.ba.rivosinc.com ([66.220.2.162]) by smtp.gmail.com with ESMTPSA id e4-20020a170902744400b001a681fb3e77sm11867810plt.44.2023.04.19.15.24.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Apr 2023 15:24:11 -0700 (PDT) From: Atish Patra To: linux-kernel@vger.kernel.org Cc: Atish Patra , Alexandre Ghiti , Andrew Jones , Andrew Morton , Anup Patel , Atish Patra , Suzuki K Poulose , Will Deacon , Marc Zyngier , Sean Christopherson , linux-coco@lists.linux.dev, Dylan Reid , abrestic@rivosinc.com, Samuel Ortiz , Jiri Slaby , kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, Palmer Dabbelt , Paolo Bonzini , Rajnesh Kanwal , Uladzislau Rezki Subject: [RFC kvmtool 05/10] riscv: Do not create APLIC for TVMs Date: Wed, 19 Apr 2023 15:23:45 -0700 Message-Id: <20230419222350.3604274-6-atishp@rivosinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230419222350.3604274-1-atishp@rivosinc.com> References: <20230419222350.3604274-1-atishp@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230419_232618_942331_C99F6C34 X-CRM114-Status: GOOD ( 12.20 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The CoVE VMs do not support wired interrupts. Thus no need of APLIC at this point. Signed-off-by: Atish Patra --- riscv/aia.c | 31 +++++++++++++++++++++---------- 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/riscv/aia.c b/riscv/aia.c index 8c85b3f..a3b8618 100644 --- a/riscv/aia.c +++ b/riscv/aia.c @@ -143,6 +143,11 @@ static int aia__init(struct kvm *kvm) .attr = KVM_DEV_RISCV_AIA_CTRL_INIT, }; + + /* CoVE VM only supports hardware with physical guest interrupt file */ + if (kvm->cfg.arch.cove_vm) + aia_mode = KVM_DEV_RISCV_AIA_MODE_HWACCEL; + /* Setup global device attribute variables */ aia_mode_attr.addr = (u64)(unsigned long)&aia_mode; aia_nr_ids_attr.addr = (u64)(unsigned long)&aia_nr_ids; @@ -160,10 +165,7 @@ static int aia__init(struct kvm *kvm) ret = ioctl(aia_fd, KVM_GET_DEVICE_ATTR, &aia_nr_ids_attr); if (ret) return ret; - aia_nr_sources = irq__get_nr_allocated_lines(); - ret = ioctl(aia_fd, KVM_SET_DEVICE_ATTR, &aia_nr_sources_attr); - if (ret) - return ret; + aia_hart_bits = fls_long(kvm->nrcpus); ret = ioctl(aia_fd, KVM_SET_DEVICE_ATTR, &aia_hart_bits_attr); if (ret) @@ -172,12 +174,21 @@ static int aia__init(struct kvm *kvm) /* Save number of HARTs for FDT generation */ aia_nr_harts = kvm->nrcpus; - /* Set AIA device addresses */ - aia_addr = AIA_APLIC_ADDR(aia_nr_harts); - aia_addr_attr.attr = KVM_DEV_RISCV_AIA_ADDR_APLIC; - ret = ioctl(aia_fd, KVM_SET_DEVICE_ATTR, &aia_addr_attr); - if (ret) - return ret; + /* CoVE VMs do not support APLIC yet */ + if (!kvm->cfg.arch.cove_vm) { + aia_nr_sources = irq__get_nr_allocated_lines(); + ret = ioctl(aia_fd, KVM_SET_DEVICE_ATTR, &aia_nr_sources_attr); + if (ret) + return ret; + + /* Set AIA device addresses */ + aia_addr = AIA_APLIC_ADDR(aia_nr_harts); + aia_addr_attr.attr = KVM_DEV_RISCV_AIA_ADDR_APLIC; + ret = ioctl(aia_fd, KVM_SET_DEVICE_ATTR, &aia_addr_attr); + if (ret) + return ret; + } + for (i = 0; i < kvm->nrcpus; i++) { aia_addr = AIA_IMSIC_ADDR(i); aia_addr_attr.attr = KVM_DEV_RISCV_AIA_ADDR_IMSIC(i);