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[1/2] RISC-V: hwprobe: There can only be one first

Message ID 20230426141333.10063-2-ajones@ventanamicro.com (mailing list archive)
State Accepted
Headers show
Series RISC-V: hwprobe: Couple fixes found on late review | expand

Checks

Context Check Description
conchuod/tree_selection fail Failed to apply to next/pending-fixes or riscv/for-next

Commit Message

Andrew Jones April 26, 2023, 2:13 p.m. UTC
Only capture the first cpu_id in order for the comparison
below to be of any use.

Fixes: ea3de9ce8aa2 ("RISC-V: Add a syscall for HW probing")
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
 arch/riscv/kernel/sys_riscv.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c
index 849b4170629d..c569dac7452e 100644
--- a/arch/riscv/kernel/sys_riscv.c
+++ b/arch/riscv/kernel/sys_riscv.c
@@ -103,8 +103,10 @@  static void hwprobe_arch_id(struct riscv_hwprobe *pair,
 			break;
 		}
 
-		if (first)
+		if (first) {
 			id = cpu_id;
+			first = false;
+		}
 
 		/*
 		 * If there's a mismatch for the given set, return -1 in the