From patchwork Thu May 18 13:10:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 13246806 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7034AC77B7D for ; Thu, 18 May 2023 13:12:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5u1RSb6fvvEj4IN/0HOiptXGsdiHjuLfWkqUBuaRHzE=; b=ilbMyA6vgUYnXU BLtvp2UPFA5y3XrWdEafi3p1G2Te83GF/HL5LhLls8mRPvIP15yUjHaHAeDEFMFD3UzTDMIdYRw6F OZ3mSxjvl1qnqIvqvUraabUElHMwdZV7ah3xj9RsUIK1cZyotNk7NDv+tOnp+51hVvrO5bpKANx+B 0H+guzH/gXgu4oAw5gOTh8jozSH4L/9X/xGvdnHEt/8P0LDQtsDhiTGWL5pIGeQc0gG62AD2DZq0J jCHADxiYoLCYl18QW71+EucPpGfW+2afiXOh+mxgKSlyhUKj6I/MU8+XM9uE9w/yhrnIiuwSMCyoh upkRV3I4OcEUlPrZHSsg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pzdR1-00D2Xn-1T; Thu, 18 May 2023 13:12:47 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pzdQy-00D2Wv-31 for linux-riscv@lists.infradead.org; Thu, 18 May 2023 13:12:46 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 8099364F54; Thu, 18 May 2023 13:12:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2F63AC4339E; Thu, 18 May 2023 13:12:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1684415563; bh=K6yzC4DxTrto6TIigKOf2HSRiKwOssJzxGPb5qsG5uk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oXJAwAIukQyUqKfJu7LCrvsuxh/2lr7uu5dOljJseAAxlywm7yBd0VVked85CNfjq IuuSjQ3DcQgJRFeh45p3dQgYfRpVz2tNQolXVKu9rK0sZ2MgE0882A/1QHYou7eh07 4XNgn+8fsLlgrSHNcB3MocDEWrzhpRblVSC8K2jrSn0CbS7jrAdUasfwC32+By7tc0 7f/1X9uwq+ZwYRbv8qHiTjboPIJEija8peqdWLq59oc44Q9Ca+TaUuK8KWZYNnf5Hd dl7nEC2nrfl05jQzwP2H1hXitACGVH5WlldFt/AFHIws3dqz6Xaxb08Lxc3x8D3btO j29hJzbTHERLA== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, mark.rutland@arm.com, bjorn@kernel.org, paul.walmsley@sifive.com, catalin.marinas@arm.com, will@kernel.org, rppt@kernel.org, anup@brainfault.org, shihua@iscas.ac.cn, jiawei@iscas.ac.cn, liweiwei@iscas.ac.cn, luxufan@iscas.ac.cn, chunyu@iscas.ac.cn, tsu.yubo@gmail.com, wefu@redhat.com, wangjunqiang@iscas.ac.cn, kito.cheng@sifive.com, andy.chiu@sifive.com, vincent.chen@sifive.com, greentime.hu@sifive.com, corbet@lwn.net, wuwei2016@iscas.ac.cn, jrtc27@jrtc27.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren Subject: [RFC PATCH 10/22] riscv: s64ilp32: Enable user space runtime environment Date: Thu, 18 May 2023 09:10:01 -0400 Message-Id: <20230518131013.3366406-11-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230518131013.3366406-1-guoren@kernel.org> References: <20230518131013.3366406-1-guoren@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230518_061245_049206_3BFF82F4 X-CRM114-Status: GOOD ( 12.84 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Guo Ren RV64ILP32 uses the same setting from COMPAT mode for the user space runtime environment. They all have the same 2GB TASK_SIZE. Signed-off-by: Guo Ren Signed-off-by: Guo Ren --- arch/riscv/include/asm/csr.h | 2 -- arch/riscv/include/asm/pgtable.h | 8 +++++++- arch/riscv/kernel/process.c | 4 +++- 3 files changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index adc3c866d353..7558e0808af4 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -36,11 +36,9 @@ #define SR_SD _AC(0x8000000000000000, ULL) /* FS/XS dirty */ #endif -#if __riscv_xlen == 64 #define SR_UXL _AC(0x300000000, ULL) /* XLEN mask for U-mode */ #define SR_UXL_32 _AC(0x100000000, ULL) /* XLEN = 32 for U-mode */ #define SR_UXL_64 _AC(0x200000000, ULL) /* XLEN = 64 for U-mode */ -#endif /* SATP flags */ #if __riscv_xlen == 32 diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 3303fc03d724..d7b8eff0ade9 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -830,26 +830,32 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte) * - 0x9fc00000 (~2.5GB) for RV32. * - 0x4000000000 ( 256GB) for RV64 using SV39 mmu * - 0x800000000000 ( 128TB) for RV64 using SV48 mmu + * - 0x80000000 ( 2GB) for COMPAT and RV64ILP32 * * Note that PGDIR_SIZE must evenly divide TASK_SIZE since "RISC-V * Instruction Set Manual Volume II: Privileged Architecture" states that * "load and store effective addresses, which are 64bits, must have bits * 63–48 all equal to bit 47, or else a page-fault exception will occur." */ +#define TASK_SIZE_32 (_AC(0x80000000, UL) - PAGE_SIZE) + #ifdef CONFIG_64BIT #define TASK_SIZE_64 (PGDIR_SIZE * PTRS_PER_PGD / 2) #define TASK_SIZE_MIN (PGDIR_SIZE_L3 * PTRS_PER_PGD / 2) #ifdef CONFIG_COMPAT -#define TASK_SIZE_32 (_AC(0x80000000, UL) - PAGE_SIZE) #define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \ TASK_SIZE_32 : TASK_SIZE_64) #else #define TASK_SIZE TASK_SIZE_64 #endif +#else +#ifdef CONFIG_ARCH_RV64ILP32 +#define TASK_SIZE TASK_SIZE_32 #else #define TASK_SIZE FIXADDR_START +#endif #define TASK_SIZE_MIN TASK_SIZE #endif diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index ab01b51a5bb9..e033dbe5b5eb 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -125,13 +125,15 @@ void start_thread(struct pt_regs *regs, unsigned long pc, regs->epc = pc; regs->sp = sp; -#ifdef CONFIG_64BIT regs->status &= ~SR_UXL; +#ifdef CONFIG_64BIT if (is_compat_task()) regs->status |= SR_UXL_32; else regs->status |= SR_UXL_64; +#else + regs->status |= SR_UXL_32; #endif }