| Message ID | 20230705-thead_vendor_extensions-v1-3-ad6915349c4d@rivosinc.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | RISC-V: Support querying vendor extensions | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/cover_letter | success | Series has a cover letter |
| conchuod/tree_selection | success | Guessed tree name to be for-next at HEAD 6259f3443c6a |
| conchuod/fixes_present | success | Fixes tag not required for -next series |
| conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 4 and now 4 |
| conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
| conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/build_rv64_clang_allmodconfig | fail | Failed to build the tree with this patch. |
| conchuod/module_param | success | Was 0 now: 0 |
| conchuod/build_rv64_gcc_allmodconfig | success | Errors and warnings before: 8 this patch: 8 |
| conchuod/build_rv32_defconfig | success | Build OK |
| conchuod/dtb_warn_rv64 | success | Errors and warnings before: 3 this patch: 3 |
| conchuod/header_inline | success | No static functions without inline keyword in header files |
| conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 20 lines checked |
| conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
| conchuod/verify_fixes | success | No Fixes tag |
| conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
diff --git a/Documentation/riscv/hwprobe.rst b/Documentation/riscv/hwprobe.rst index 19165ebd82ba..167fd3e25632 100644 --- a/Documentation/riscv/hwprobe.rst +++ b/Documentation/riscv/hwprobe.rst @@ -97,3 +97,20 @@ The following keys are defined: * :c:macro:`RISCV_HWPROBE_MISALIGNED_UNSUPPORTED`: Misaligned accesses are not supported at all and will generate a misaligned address fault. + +RISC-V Hardware Probing Interface Vendor Extensions +--------------------------------------------------- + +All vendor extensions live at and beyond +:c:macro:`RISCV_HWPROBE_VENDOR_EXTENSION_SPACE`. Each vendor can specify vendor +extensions at any value above or equal to +:c:macro:`RISCV_HWPROBE_VENDOR_EXTENSION_SPACE` without worrying about +conflicting with values from other vendors. Only extensions from the vendor of +the cpus passed into riscv_hwprobe will be matched. + +T-HEAD +~~~~~~ + +* :c:macro:`THEAD_ISA_EXT0`: Contains all of the EXT0 extensions + + * :c:macro:`THEAD_ISA_EXT0_V0_7_1`: Vector extension V0.7.1 is supported
Document available vendor extensions. Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> --- Documentation/riscv/hwprobe.rst | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)