From patchwork Fri Jul 28 13:13:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daire McNamara X-Patchwork-Id: 13331892 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CAC1DC001DE for ; Fri, 28 Jul 2023 13:14:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=QVF6DxGa30+QONtFUe3KCOm0hfFH0PF5GWSmiTMPq8o=; b=H1C0ACRNi+fGM4 MtrFK6isRslGfooFC520oHGSS85uyVERkdIjW9ux+Y1EbAHvl+O0cZdTQNnWGH9qhKHPcam54MZ67 d33YkyDID2arpUV3lnOXO+ThsC3R2NeTOJiMlFU6TfZplCWnp75h3RcSgyzWb7SmyNvi5EEe4qDh2 Ijfka8V5nEEZMu3NmNzM2sPCVoMwInMWmimA0xmXvAz+rVjsrOPU06+1XZ0zBztyWwL/VAKUAUNiP rZYNiFEuWitEdre0rFnWMkTlaLPu5p1TxZacOGFSH9r7+7ddzBHKik7XnUdXvW2bqtSHgUm/EdPml Qd76Wu+fWTdjNXfS0GrQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qPNIR-003VFR-09; Fri, 28 Jul 2023 13:14:19 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qPNIM-003VCo-18 for linux-riscv@lists.infradead.org; Fri, 28 Jul 2023 13:14:17 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1690550055; x=1722086055; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=iQVdQ5/Fd7A+l93rxa4YuqFXIveaFWB1LxC6Y87vXmk=; b=iDnjYmcQIK4FwXh0rPnV+FBfJJRkmPC8G9X8LL6DK/eunH7hVSXIQ4Uk KKQdjcVvjngCykAmEgr/JIOybOfKKJ4EhAQopVClH3VVeKDlLNR2JlZqv IuoikYx4W4xweto3CPfDdwPXfPx5iM46fdRzFjNQ4eUM1AuurwY4nLmdG ugmF/FQL2f8ip0gUBeUl1z0PqDRKZBH1T2Cb6G6+OlalI6JMtRdVhQ82N gSUDDsdsBNIvG9sO/lrX3GF1BaT8VyGtze9GWVBHKVwaLXeR3nfhHpCAX iYS+6Z+pXM7Phg0nddMq1LSd1BzkSccKheIyYedeTR8b9Sx7Q/tosgOZh Q==; X-IronPort-AV: E=Sophos;i="6.01,237,1684825200"; d="scan'208";a="222753017" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 28 Jul 2023 06:14:08 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Fri, 28 Jul 2023 06:14:07 -0700 Received: from daire-X570.amer.actel.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Fri, 28 Jul 2023 06:14:06 -0700 From: To: , , , , , , CC: Daire McNamara Subject: [PATCH v3 1/7] PCI: microchip: Correct the DED and SEC interrupt bit offsets Date: Fri, 28 Jul 2023 14:13:55 +0100 Message-ID: <20230728131401.1615724-2-daire.mcnamara@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230728131401.1615724-1-daire.mcnamara@microchip.com> References: <20230728131401.1615724-1-daire.mcnamara@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230728_061414_452038_9597C959 X-CRM114-Status: UNSURE ( 8.23 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Daire McNamara The SEC and DED interrupt bits were the wrong way round so the SEC interrupt handler attempted to mask, unmask, and clear the DED interrupt and vice versa. Correct the bit offsets so each interrupt handler operates properly. Fixes: 6f15a9c9f941 ("PCI: microchip: Add Microchip PolarFire PCIe controller driver") Signed-off-by: Daire McNamara Reviewed-by: Conor Dooley --- drivers/pci/controller/pcie-microchip-host.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pcie-microchip-host.c b/drivers/pci/controller/pcie-microchip-host.c index 5e710e485464..dd5245904c87 100644 --- a/drivers/pci/controller/pcie-microchip-host.c +++ b/drivers/pci/controller/pcie-microchip-host.c @@ -167,12 +167,12 @@ #define EVENT_PCIE_DLUP_EXIT 2 #define EVENT_SEC_TX_RAM_SEC_ERR 3 #define EVENT_SEC_RX_RAM_SEC_ERR 4 -#define EVENT_SEC_AXI2PCIE_RAM_SEC_ERR 5 -#define EVENT_SEC_PCIE2AXI_RAM_SEC_ERR 6 +#define EVENT_SEC_PCIE2AXI_RAM_SEC_ERR 5 +#define EVENT_SEC_AXI2PCIE_RAM_SEC_ERR 6 #define EVENT_DED_TX_RAM_DED_ERR 7 #define EVENT_DED_RX_RAM_DED_ERR 8 -#define EVENT_DED_AXI2PCIE_RAM_DED_ERR 9 -#define EVENT_DED_PCIE2AXI_RAM_DED_ERR 10 +#define EVENT_DED_PCIE2AXI_RAM_DED_ERR 9 +#define EVENT_DED_AXI2PCIE_RAM_DED_ERR 10 #define EVENT_LOCAL_DMA_END_ENGINE_0 11 #define EVENT_LOCAL_DMA_END_ENGINE_1 12 #define EVENT_LOCAL_DMA_ERROR_ENGINE_0 13