From patchwork Wed Aug 2 08:43:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xingyu Wu X-Patchwork-Id: 13337856 X-Patchwork-Delegate: mail@conchuod.ie Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0713AC00528 for ; Wed, 2 Aug 2023 08:43:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=xrM85I07ItdotCvimENGpZ2Jen7SknPw1uTqsmr+N+M=; b=i2dC9nvtiyoqz7 BJj9+WiOUMf/xBR3IpEwEufC40tWMJGm6fi8Lw31/WH800XLzZmmYE3P6qYVqj4MbxVOrye7E7wrL MQOy8xwnhx4dRgYwW9W7ElAiRB9gU1UskKC0JFFw5xEq/6ndAgqcoPslF6+cXXHHins/Nu3YwFbkA aN0hSQ2J70N+0hjVBdEo8XYUEtnPEjAjVA58tPCP+9dGdTDpz6EZwZIk0L0PpXc4djG7RMvfCxG5w n3rC37nLD7p0ytDhGM/2nk1xz2yB1to3QHBZQX5ZHtm9I8yBiY36SZYV14ACbjP/+vQsOTxT2EXXT VAopwsWwcwLm+YlfygDA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qR7S6-004OKk-22; Wed, 02 Aug 2023 08:43:30 +0000 Received: from ex01.ufhost.com ([61.152.239.75]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qR7S3-004OFG-2O for linux-riscv@lists.infradead.org; Wed, 02 Aug 2023 08:43:29 +0000 Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 67EAC24E27D; Wed, 2 Aug 2023 16:43:06 +0800 (CST) Received: from EXMBX061.cuchost.com (172.16.6.61) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 2 Aug 2023 16:43:06 +0800 Received: from localhost.localdomain (183.27.98.54) by EXMBX061.cuchost.com (172.16.6.61) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 2 Aug 2023 16:43:05 +0800 From: Xingyu Wu To: Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , "Maxim Kochetkov" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Emil Renner Berthing CC: Jose Abreu , Paul Walmsley , Palmer Dabbelt , Albert Ou , Walker Chen , "Xingyu Wu" , , , , Subject: [PATCH v1 4/5] riscv: dts: starfive: pinfunc: Fix the pins name of I2STX1 Date: Wed, 2 Aug 2023 16:43:00 +0800 Message-ID: <20230802084301.134122-5-xingyu.wu@starfivetech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230802084301.134122-1-xingyu.wu@starfivetech.com> References: <20230802084301.134122-1-xingyu.wu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [183.27.98.54] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX061.cuchost.com (172.16.6.61) X-YovoleRuleAgent: yovoleflag X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230802_014327_926416_A255E3F6 X-CRM114-Status: GOOD ( 11.62 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org These pins are actually I2STX1 clock input, not I2STX0, so their names should be changed. Signed-off-by: Xingyu Wu --- arch/riscv/boot/dts/starfive/jh7110-pinfunc.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h b/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h index fb0139b56723..256de17f5261 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h +++ b/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h @@ -240,8 +240,8 @@ #define GPI_SYS_MCLK_EXT 30 #define GPI_SYS_I2SRX_BCLK 31 #define GPI_SYS_I2SRX_LRCK 32 -#define GPI_SYS_I2STX0_BCLK 33 -#define GPI_SYS_I2STX0_LRCK 34 +#define GPI_SYS_I2STX1_BCLK 33 +#define GPI_SYS_I2STX1_LRCK 34 #define GPI_SYS_TDM_CLK 35 #define GPI_SYS_TDM_RXD 36 #define GPI_SYS_TDM_SYNC 37