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Thu, 03 Aug 2023 19:11:11 -0700 (PDT) Received: from charlie.ba.rivosinc.com ([66.220.2.162]) by smtp.gmail.com with ESMTPSA id g6-20020a655806000000b0055c558ac4edsm369499pgr.46.2023.08.03.19.11.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 19:11:10 -0700 (PDT) From: Charlie Jenkins Date: Thu, 03 Aug 2023 19:10:35 -0700 Subject: [PATCH 10/10] RISC-V: Refactor bug and traps instructions MIME-Version: 1.0 Message-Id: <20230803-master-refactor-instructions-v4-v1-10-2128e61fa4ff@rivosinc.com> References: <20230803-master-refactor-instructions-v4-v1-0-2128e61fa4ff@rivosinc.com> In-Reply-To: <20230803-master-refactor-instructions-v4-v1-0-2128e61fa4ff@rivosinc.com> To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, bpf@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Peter Zijlstra , Josh Poimboeuf , Jason Baron , Steven Rostedt , Ard Biesheuvel , Anup Patel , Atish Patra , Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Martin KaFai Lau , Song Liu , Yonghong Song , John Fastabend , KP Singh , Stanislav Fomichev , Hao Luo , Jiri Olsa , =?utf-8?b?Qmo=?= =?utf-8?b?w7ZybiBUw7ZwZWw=?= , Luke Nelson , Xi Wang , Nam Cao , Charlie Jenkins X-Mailer: b4 0.12.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230803_191114_356611_1919FD15 X-CRM114-Status: GOOD ( 10.77 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Use shared instruction definitions in insn.h instead of manually constructing them. Signed-off-by: Charlie Jenkins --- arch/riscv/include/asm/bug.h | 18 +++++------------- arch/riscv/kernel/traps.c | 9 +++++---- 2 files changed, 10 insertions(+), 17 deletions(-) diff --git a/arch/riscv/include/asm/bug.h b/arch/riscv/include/asm/bug.h index 1aaea81fb141..6d9002d93f85 100644 --- a/arch/riscv/include/asm/bug.h +++ b/arch/riscv/include/asm/bug.h @@ -11,21 +11,13 @@ #include #include +#include -#define __INSN_LENGTH_MASK _UL(0x3) -#define __INSN_LENGTH_32 _UL(0x3) -#define __COMPRESSED_INSN_MASK _UL(0xffff) +#define __IS_BUG_INSN_32(insn) riscv_insn_is_c_ebreak(insn) +#define __IS_BUG_INSN_16(insn) riscv_insn_is_ebreak(insn) -#define __BUG_INSN_32 _UL(0x00100073) /* ebreak */ -#define __BUG_INSN_16 _UL(0x9002) /* c.ebreak */ - -#define GET_INSN_LENGTH(insn) \ -({ \ - unsigned long __len; \ - __len = ((insn & __INSN_LENGTH_MASK) == __INSN_LENGTH_32) ? \ - 4UL : 2UL; \ - __len; \ -}) +#define __BUG_INSN_32 RVG_MATCH_EBREAK +#define __BUG_INSN_16 RVC_MATCH_C_EBREAK typedef u32 bug_insn_t; diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c index f910dfccbf5d..970b118d36b5 100644 --- a/arch/riscv/kernel/traps.c +++ b/arch/riscv/kernel/traps.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -243,7 +244,7 @@ static inline unsigned long get_break_insn_length(unsigned long pc) if (get_kernel_nofault(insn, (bug_insn_t *)pc)) return 0; - return GET_INSN_LENGTH(insn); + return INSN_LEN(insn); } void handle_break(struct pt_regs *regs) @@ -389,10 +390,10 @@ int is_valid_bugaddr(unsigned long pc) return 0; if (get_kernel_nofault(insn, (bug_insn_t *)pc)) return 0; - if ((insn & __INSN_LENGTH_MASK) == __INSN_LENGTH_32) - return (insn == __BUG_INSN_32); + if (INSN_IS_C(insn)) + return __IS_BUG_INSN_16(insn); else - return ((insn & __COMPRESSED_INSN_MASK) == __BUG_INSN_16); + return __IS_BUG_INSN_32(insn); } #endif /* CONFIG_GENERIC_BUG */