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Thu, 03 Aug 2023 19:10:56 -0700 (PDT) Received: from charlie.ba.rivosinc.com ([66.220.2.162]) by smtp.gmail.com with ESMTPSA id g6-20020a655806000000b0055c558ac4edsm369499pgr.46.2023.08.03.19.10.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 19:10:56 -0700 (PDT) From: Charlie Jenkins Date: Thu, 03 Aug 2023 19:10:28 -0700 Subject: [PATCH 03/10] RISC-V: Refactor jump label instructions MIME-Version: 1.0 Message-Id: <20230803-master-refactor-instructions-v4-v1-3-2128e61fa4ff@rivosinc.com> References: <20230803-master-refactor-instructions-v4-v1-0-2128e61fa4ff@rivosinc.com> In-Reply-To: <20230803-master-refactor-instructions-v4-v1-0-2128e61fa4ff@rivosinc.com> To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, bpf@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Peter Zijlstra , Josh Poimboeuf , Jason Baron , Steven Rostedt , Ard Biesheuvel , Anup Patel , Atish Patra , Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Martin KaFai Lau , Song Liu , Yonghong Song , John Fastabend , KP Singh , Stanislav Fomichev , Hao Luo , Jiri Olsa , =?utf-8?b?Qmo=?= =?utf-8?b?w7ZybiBUw7ZwZWw=?= , Luke Nelson , Xi Wang , Nam Cao , Charlie Jenkins X-Mailer: b4 0.12.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230803_191059_874265_17A83701 X-CRM114-Status: GOOD ( 10.82 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Use shared instruction definitions in insn.h instead of manually constructing them. Signed-off-by: Charlie Jenkins --- arch/riscv/include/asm/insn.h | 2 +- arch/riscv/kernel/jump_label.c | 13 ++++--------- 2 files changed, 5 insertions(+), 10 deletions(-) diff --git a/arch/riscv/include/asm/insn.h b/arch/riscv/include/asm/insn.h index 04f7649e1add..124ab02973a7 100644 --- a/arch/riscv/include/asm/insn.h +++ b/arch/riscv/include/asm/insn.h @@ -1984,7 +1984,7 @@ static __always_inline bool riscv_insn_is_branch(u32 code) << RVC_J_IMM_10_OFF) | \ (RVC_IMM_SIGN(x_) << RVC_J_IMM_SIGN_OFF); }) -#define RVC_EXTRACT_BTYPE_IMM(x) \ +#define RVC_EXTRACT_BZ_IMM(x) \ ({typeof(x) x_ = (x); \ (RVC_X(x_, RVC_BZ_IMM_2_1_OPOFF, RVC_BZ_IMM_2_1_MASK) \ << RVC_BZ_IMM_2_1_OFF) | \ diff --git a/arch/riscv/kernel/jump_label.c b/arch/riscv/kernel/jump_label.c index e6694759dbd0..fdaac2a13eac 100644 --- a/arch/riscv/kernel/jump_label.c +++ b/arch/riscv/kernel/jump_label.c @@ -9,11 +9,9 @@ #include #include #include +#include #include -#define RISCV_INSN_NOP 0x00000013U -#define RISCV_INSN_JAL 0x0000006fU - void arch_jump_label_transform(struct jump_entry *entry, enum jump_label_type type) { @@ -26,13 +24,10 @@ void arch_jump_label_transform(struct jump_entry *entry, if (WARN_ON(offset & 1 || offset < -524288 || offset >= 524288)) return; - insn = RISCV_INSN_JAL | - (((u32)offset & GENMASK(19, 12)) << (12 - 12)) | - (((u32)offset & GENMASK(11, 11)) << (20 - 11)) | - (((u32)offset & GENMASK(10, 1)) << (21 - 1)) | - (((u32)offset & GENMASK(20, 20)) << (31 - 20)); + insn = RVG_OPCODE_JAL; + riscv_insn_insert_jtype_imm(&insn, (s32)offset); } else { - insn = RISCV_INSN_NOP; + insn = RVG_OPCODE_NOP; } mutex_lock(&text_mutex);