From patchwork Fri Aug 25 09:01:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Minda Chen X-Patchwork-Id: 13365236 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9FB2BC3DA66 for ; Fri, 25 Aug 2023 09:02:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=QxQSvmnoOrMnBd8slaJ3/BVQZAvTbnSnq+5IBA9X21E=; b=AAw2GSvrnX5eou 9ILf9WsIr19PB+C2Fy4YVin0nD6JI1f1eAopHPC5mF+CAtfV2CIG/v3E21IUDrKq8MR1mtyixjM96 DbyQrGlb11h5dOWjrx0FlHsWr4s7cHrm3+4eb32hwNRHgJydP1g4KfjtpgrDU1Ym56r1FX4Dmk8pi 7j7kf3/T+mwt+5HT6FhaDLvvoShfSdYnsDRTf6ClgzY0+OySOQy0v0EiRmGTwthE/sI78+rKfHil7 rXHgEbQwZRFxTmtM2sd2Zi3MAsE2nN/H0duKuwo5rkWKvxEA+hMzJ8SHL5lfUhsV7PbyEsQe0asVn IfmKTBlHXCmj571wGcVQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qZShz-004g4s-0T; Fri, 25 Aug 2023 09:02:23 +0000 Received: from ex01.ufhost.com ([61.152.239.75]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qZShq-004fsV-1A for linux-riscv@lists.infradead.org; Fri, 25 Aug 2023 09:02:16 +0000 Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 9B02424E236; Fri, 25 Aug 2023 17:01:39 +0800 (CST) Received: from EXMBX171.cuchost.com (172.16.6.91) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 25 Aug 2023 17:01:39 +0800 Received: from ubuntu.localdomain (113.72.145.205) by EXMBX171.cuchost.com (172.16.6.91) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 25 Aug 2023 17:01:38 +0800 From: Minda Chen To: Daire McNamara , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Emil Renner Berthing CC: , , , , =?utf-8?q?P?= =?utf-8?q?ali_Roh=C3=A1r?= , Paul Walmsley , Palmer Dabbelt , Albert Ou , Philipp Zabel , Mason Huo , Leyfoon Tan , Kevin Xie , Minda Chen Subject: [PATCH v4 07/11] PCI: microchip: Rename IRQ init function Date: Fri, 25 Aug 2023 17:01:25 +0800 Message-ID: <20230825090129.65721-8-minda.chen@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230825090129.65721-1-minda.chen@starfivetech.com> References: <20230825090129.65721-1-minda.chen@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [113.72.145.205] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX171.cuchost.com (172.16.6.91) X-YovoleRuleAgent: yovoleflag X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230825_020214_770759_A5E7D770 X-CRM114-Status: GOOD ( 19.34 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Rename IRQ init function and prepare for re-use IRQ init function. Add plda_pcie_ops function pointer data structure, PolarFire PCIe uses function pointer to get their events num. rename list: mc_init_interrupts() -> plda_init_interrupts() mc_pcie_init_irq_domain()-> plda_pcie_init_irq_domains() Signed-off-by: Minda Chen --- .../pci/controller/plda/pcie-microchip-host.c | 49 ++++++++++++++----- drivers/pci/controller/plda/pcie-plda.h | 14 ++++++ 2 files changed, 51 insertions(+), 12 deletions(-) diff --git a/drivers/pci/controller/plda/pcie-microchip-host.c b/drivers/pci/controller/plda/pcie-microchip-host.c index b1d5b5b3cee5..03e8e93ea7e4 100644 --- a/drivers/pci/controller/plda/pcie-microchip-host.c +++ b/drivers/pci/controller/plda/pcie-microchip-host.c @@ -416,7 +416,10 @@ static void mc_handle_event(struct irq_desc *desc) chained_irq_enter(chip, desc); - events = get_events(port); + if (port->ops && port->ops->get_events) + events = port->ops->get_events(port); + else + events = get_events(port); for_each_set_bit(bit, &events, NUM_EVENTS) generic_handle_domain_irq(port->event_domain, bit); @@ -562,11 +565,12 @@ static int mc_pcie_init_clks(struct device *dev) return 0; } -static int mc_pcie_init_irq_domains(struct plda_pcie_rp *port) +static int plda_pcie_init_irq_domains(struct plda_pcie_rp *port, struct plda_evt *evt) { struct device *dev = port->dev; struct device_node *node = dev->of_node; struct device_node *pcie_intc_node; + const struct irq_domain_ops *ops; /* Setup INTx */ pcie_intc_node = of_get_next_child(node, NULL); @@ -575,8 +579,9 @@ static int mc_pcie_init_irq_domains(struct plda_pcie_rp *port) return -EINVAL; } - port->event_domain = irq_domain_add_linear(pcie_intc_node, NUM_EVENTS, - &event_domain_ops, port); + ops = evt->domain_ops ? evt->domain_ops : &event_domain_ops; + port->event_domain = irq_domain_add_linear(pcie_intc_node, port->num_events, + ops, port); if (!port->event_domain) { dev_err(dev, "failed to get event domain\n"); of_node_put(pcie_intc_node); @@ -661,14 +666,15 @@ static void mc_disable_interrupts(struct mc_pcie *port) writel_relaxed(GENMASK(31, 0), bridge_base_addr + ISTATUS_HOST); } -static int mc_init_interrupts(struct platform_device *pdev, struct plda_pcie_rp *port) +static int plda_init_interrupts(struct platform_device *pdev, + struct plda_pcie_rp *port, struct plda_evt *evt) { struct device *dev = &pdev->dev; int irq; int i, intx_irq, msi_irq, event_irq; int ret; - ret = mc_pcie_init_irq_domains(port); + ret = plda_pcie_init_irq_domains(port, evt); if (ret) { dev_err(dev, "failed creating IRQ domains\n"); return ret; @@ -678,15 +684,18 @@ static int mc_init_interrupts(struct platform_device *pdev, struct plda_pcie_rp if (irq < 0) return -ENODEV; - for (i = 0; i < NUM_EVENTS; i++) { + for (i = 0; i < port->num_events; i++) { event_irq = irq_create_mapping(port->event_domain, i); if (!event_irq) { dev_err(dev, "failed to map hwirq %d\n", i); return -ENXIO; } - ret = devm_request_irq(dev, event_irq, mc_event_handler, - 0, event_cause[i].sym, port); + if (evt->request_evt_irq) + ret = evt->request_evt_irq(port, event_irq, i); + else + ret = devm_request_irq(dev, event_irq, plda_event_handler, + 0, NULL, port); if (ret) { dev_err(dev, "failed to request IRQ %d\n", event_irq); return ret; @@ -694,7 +703,7 @@ static int mc_init_interrupts(struct platform_device *pdev, struct plda_pcie_rp } intx_irq = irq_create_mapping(port->event_domain, - EVENT_LOCAL_PM_MSI_INT_INTX); + evt->intx_evt); if (!intx_irq) { dev_err(dev, "failed to map INTx interrupt\n"); return -ENXIO; @@ -704,7 +713,7 @@ static int mc_init_interrupts(struct platform_device *pdev, struct plda_pcie_rp irq_set_chained_handler_and_data(intx_irq, plda_handle_intx, port); msi_irq = irq_create_mapping(port->event_domain, - EVENT_LOCAL_PM_MSI_INT_MSI); + evt->msi_evt); if (!msi_irq) return -ENXIO; @@ -717,6 +726,17 @@ static int mc_init_interrupts(struct platform_device *pdev, struct plda_pcie_rp return 0; } +static int mc_request_evt_irq(struct plda_pcie_rp *plda, int event_irq, + int evt) +{ + return devm_request_irq(plda->dev, event_irq, mc_event_handler, + 0, event_cause[evt].sym, plda); +} + +static const struct plda_pcie_ops plda_ops = { + .get_events = get_events, +}; + static int mc_platform_init(struct pci_config_window *cfg) { struct device *dev = cfg->parent; @@ -724,6 +744,9 @@ static int mc_platform_init(struct pci_config_window *cfg) void __iomem *bridge_base_addr = port->axi_base_addr + MC_PCIE_BRIDGE_ADDR; struct pci_host_bridge *bridge = platform_get_drvdata(pdev); + struct plda_evt evt = {&event_domain_ops, mc_request_evt_irq, + EVENT_LOCAL_PM_MSI_INT_INTX, + EVENT_LOCAL_PM_MSI_INT_MSI}; int ret; /* Configure address translation table 0 for PCIe config space */ @@ -740,7 +763,7 @@ static int mc_platform_init(struct pci_config_window *cfg) return ret; /* Address translation is up; safe to enable interrupts */ - ret = mc_init_interrupts(pdev, &port->plda); + ret = plda_init_interrupts(pdev, &port->plda, &evt); if (ret) return ret; @@ -761,6 +784,8 @@ static int mc_host_probe(struct platform_device *pdev) plda = &port->plda; plda->dev = dev; + plda->num_events = NUM_EVENTS; + plda->ops = &plda_ops; port->axi_base_addr = devm_platform_ioremap_resource(pdev, 1); if (IS_ERR(port->axi_base_addr)) diff --git a/drivers/pci/controller/plda/pcie-plda.h b/drivers/pci/controller/plda/pcie-plda.h index 315d9874b899..ef33c1365b3e 100644 --- a/drivers/pci/controller/plda/pcie-plda.h +++ b/drivers/pci/controller/plda/pcie-plda.h @@ -104,6 +104,12 @@ #define PM_MSI_TO_MASK_OFFSET 19 +struct plda_pcie_rp; + +struct plda_pcie_ops { + u32 (*get_events)(struct plda_pcie_rp *pcie); +}; + struct plda_msi { struct mutex lock; /* Protect used bitmap */ struct irq_domain *msi_domain; @@ -119,10 +125,18 @@ struct plda_pcie_rp { struct irq_domain *event_domain; raw_spinlock_t lock; struct plda_msi msi; + const struct plda_pcie_ops *ops; void __iomem *bridge_addr; int num_events; }; +struct plda_evt { + const struct irq_domain_ops *domain_ops; + int (*request_evt_irq)(struct plda_pcie_rp *pcie, int evt_irq, int event); + int intx_evt; + int msi_evt; +}; + void plda_handle_msi(struct irq_desc *desc); int plda_allocate_msi_domains(struct plda_pcie_rp *port); irqreturn_t plda_event_handler(int irq, void *dev_id);