From patchwork Tue Nov 7 10:55:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= X-Patchwork-Id: 13448515 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 64D4CC4332F for ; Tue, 7 Nov 2023 10:56:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=YTbz2NTSUtp9ZggXYy65L1VIgthNTF9HfrTubO/LD+c=; b=sK5z+6OHdPKDR4 pKcQMugZAUV2SZL2qkg9XkV8gLsECqbISwXHNJILJLQfh/mTFRsXVaXu32vyrdOAN0AmWykHQcQCX c4pgJWLhbQjrbg143X+NNzFsE26P14tfirtdnlEFMyvN8pyPdw5yATuaL3mbOYn0Ma9ipoCw9fqWC 4f8BhzfXPb6CiKHhBZCNYkKovq6un2F/7Znlz2ZNW6Rve2hO5b+dyZcAd0ak7cfEQDVPop2Dos8jx bA5R2QLYgYQxWxuOMCrEVR7R+TmsDC1sCxt9s94ZsVKLvvF1dYEQUojrRcxIuUsGDZFSSa+XH+azv QDK5+Q0hSAVzL3NC+o3A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1r0Jl9-0019lr-39; Tue, 07 Nov 2023 10:56:40 +0000 Received: from mail-ej1-f46.google.com ([209.85.218.46]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1r0Jky-0019S3-06 for linux-riscv@lists.infradead.org; Tue, 07 Nov 2023 10:56:31 +0000 Received: by mail-ej1-f46.google.com with SMTP id a640c23a62f3a-9c96a82e93bso174654466b.0 for ; Tue, 07 Nov 2023 02:56:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1699354584; x=1699959384; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PQVPAaYHkpM0GEJ73m22K8qqx/erlq7lj5m1X7f1ukE=; b=bugMcJGVKkAeJfPg2ddtL2oq/l/yKgZSltFM59xpuwbghIKGWEhnLFRLNWZr5G6+ux 2qCnCnw63sTE1hzeQrrvbghBf30pkDLkP2cpFktl+pJ3SvcgNmvSq+rJKca4mnWMCYiR iTD+PJncTD3yITNxNgBjAdApjFtrJVB2tqi+kbKB6zUap9z620tOFIEpISFeD33gjimC 5A53cvpdykUYayfCpVVu8E92EVegNvWBvLKKm7y47z4R7T0WFTWjv5Se+SK4P0NNL6iL rm6jyCv4WniVzi6k7lo5WzT6YpwdQFroE/CkX+bX3TONjTfb0Of7MX6PcKV01AtlNAip bbnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699354584; x=1699959384; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PQVPAaYHkpM0GEJ73m22K8qqx/erlq7lj5m1X7f1ukE=; b=EE3dzX5tAuqrfg7Ak3Ubve1uDEuOeaOHvFiCaW9mKKJzxtJBIZDISWxtNb2YjBIHTO Y/Qy+tP6LqoCiNCdMr0IW0OVp8wS24EOup5pQJU0GFcjdKtE6ze/ui57EJ3h+dpS0hRY zMjv8MFzZBQBU3/Z9ktMG0KSe+TExfQIBjjmiUfrUVfQo7Jo5BxMhhfyShvjnJk6YEwl XUGbwGpa/E6C3WfrygS8h3pLkOq0SHDqQH0ni+vIdscgVg0/0ZGQr1NE85/T24YELPF0 C7SkY24nTSk/kTuLzCs20b8Pwo/5YDMOffBpeZx07J/o5NHXuzGymuP+zANc6ipYFvu6 wN6Q== X-Gm-Message-State: AOJu0YxO7d7q0TmpqaI6+0sMF8bxNo2PS/fhL19u8b60KSDb5N82ZfEH AAILHNMW3gP/CGt6ILHmdUzO7eP5sQ5OJ3jPQT78Xg== X-Google-Smtp-Source: AGHT+IGj0yQcu+DGOcyOjDKINIocvRDdaol8XKw87jQoMj8DVyz/EpNBoI48Bn4wmnkpdAazd54/WA== X-Received: by 2002:a17:907:86aa:b0:9bf:b83c:5efd with SMTP id qa42-20020a17090786aa00b009bfb83c5efdmr24912005ejc.3.1699354584016; Tue, 07 Nov 2023 02:56:24 -0800 (PST) Received: from carbon-x1.. ([2a01:e0a:999:a3a0:7db3:bdd9:4cab:2ee3]) by smtp.gmail.com with ESMTPSA id n30-20020a05600c501e00b00405442edc69sm15396853wmr.14.2023.11.07.02.56.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 02:56:23 -0800 (PST) From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Palmer Dabbelt , Paul Walmsley , Rob Herring , Krzysztof Kozlowski , Albert Ou , Jonathan Corbet , Andrew Jones , Evan Green , Conor Dooley , Samuel Ortiz Subject: [PATCH v3 19/20] riscv: hwprobe: export Zfa ISA extension Date: Tue, 7 Nov 2023 11:55:55 +0100 Message-ID: <20231107105556.517187-20-cleger@rivosinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231107105556.517187-1-cleger@rivosinc.com> References: <20231107105556.517187-1-cleger@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231107_025628_084200_3C358581 X-CRM114-Status: GOOD ( 11.52 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Export Zfa ISA extension[1] through hwprobe. Link: https://drive.google.com/file/d/1VT6QIggpb59-8QRV266dEE4T8FZTxGq4/view [1] Signed-off-by: Clément Léger Reviewed-by: Evan Green --- Documentation/arch/riscv/hwprobe.rst | 4 ++++ arch/riscv/include/uapi/asm/hwprobe.h | 1 + arch/riscv/kernel/sys_riscv.c | 1 + 3 files changed, 6 insertions(+) diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst index 2a2fe4b026e7..a53fbc076d7e 100644 --- a/Documentation/arch/riscv/hwprobe.rst +++ b/Documentation/arch/riscv/hwprobe.rst @@ -154,6 +154,10 @@ The following keys are defined: defined in the RISC-V Vector manual starting from commit e2ccd0548d6c ("Remove draft warnings from Zvfh[min]"). + * :c:macro:`RISCV_HWPROBE_EXT_ZFA`: The Zfa extension is supported as + defined in the RISC-V ISA manual starting from commit 056b6ff467c7 + ("Zfa is ratified"). + * :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance information about the selected set of processors. diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h index 5124327b70ff..71f6cda52c4c 100644 --- a/arch/riscv/include/uapi/asm/hwprobe.h +++ b/arch/riscv/include/uapi/asm/hwprobe.h @@ -54,6 +54,7 @@ struct riscv_hwprobe { #define RISCV_HWPROBE_EXT_ZIHINTNTL (1 << 28) #define RISCV_HWPROBE_EXT_ZVFH (1 << 29) #define RISCV_HWPROBE_EXT_ZVFHMIN (1 << 30) +#define RISCV_HWPROBE_EXT_ZFA (1 << 31) #define RISCV_HWPROBE_KEY_CPUPERF_0 5 #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0) diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c index 3cd5d42ae01f..dedfe3c6a37b 100644 --- a/arch/riscv/kernel/sys_riscv.c +++ b/arch/riscv/kernel/sys_riscv.c @@ -192,6 +192,7 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, if (has_fpu()) { CHECK_ISA_EXT(ZFH); CHECK_ISA_EXT(ZFHMIN); + CHECK_ISA_EXT(ZFA); } #undef CHECK_ISA_EXT }