From patchwork Tue Nov 7 10:55:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= X-Patchwork-Id: 13448500 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 245FAC4332F for ; Tue, 7 Nov 2023 10:56:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4YJ6VFaXAKtjegHmXxPODu4t01gYcUxRzB2mo3j1/XE=; b=BmlP/0TNxfKa/l PS0RR/GByz5wvn+2AQoYQMu9/gWD33FBYtFbZ/f0lzLRy3iXtGig/ejFPkGh1T2MZ57/KCcwV/2rC d37d8xhqxIEYHquQhASP/XuEpNGaiQE7FMe7Obr54U1as0ekTIk4qnP28VzFbhHzKY7FMEib6XoXR /ScwidmocPx6P3OO3fkVDM+erBATAvpTD74NtNPWGO9EjsPNt0OvHrHRO3UTdNJ0nJbIOJO/jjhQd xj+2M6p/esDGm2noWc6cwq3hJfIA3c+p8pbw8q7JCFNwg/4ykndnxg+o7cs8nbjXPJH6OQqRxBLtP D+8np3oHDG3mFB8bes6Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1r0Jki-0019A3-17; Tue, 07 Nov 2023 10:56:12 +0000 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1r0Jkd-00197H-2s for linux-riscv@lists.infradead.org; Tue, 07 Nov 2023 10:56:09 +0000 Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-32f831087c6so1250701f8f.0 for ; Tue, 07 Nov 2023 02:56:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1699354565; x=1699959365; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=n2QJAM1NTLzbssZcNNT+NMVix19aOXjDu6owokPhRTA=; b=exqZH4voBmVOwWJcO9pnwb68F77ysnxc/fO5JbGH1mD11sdilPY3E7XNmU1+6DPsSA egRe79EZMmERf9pR71AfSJ+yY8zOJvk7RdP+gz2IFou97LjtsHmO9vHEPlzzu/mfsX/V JgH7Y23dJ255kTYCgciH8ofAuoHAhtjZukiG4ibBcLlSAM55TVFD7TOSCDgMOdroCM2p QyozhUH1O3Q+6EYP4us5GZ74Sfn3ZUetn3uoo0F3jaGA4wL4aTwy0d7KlmZHNmOfyIiK 5BI1h8LB65LZeb5V/Czxx5MPX4Mql1hpnf/1O6NfxMK51B6/ag8OPfGt3oinBKXEVM3a nWeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699354565; x=1699959365; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=n2QJAM1NTLzbssZcNNT+NMVix19aOXjDu6owokPhRTA=; b=mAT5NgYRc9JcSzgdpTEiDmJitRrCydVbDeF2HL/C99fptRkWjoN38sC2liECFa2/pS 50M6oyY9hb4nef3Gqm4kkI2nmeosZRgQV5D4dd00i/rUxGmDMsW5SgsB3dnhz4Tk+7rl wpU7hm7cr0pU5M8XUtKOxrBFcr8ecZJIbX9WnckTHAX+/e82oe6CyVG193VK77Wxtv0b 1FYVA1fn0rFZQXMi1ah/dVkLeXkpsqh5muViqfnvf5QExtjFewSRIXot5beyupmPIp3H WXjQo2f7usnm+1k7ucP8Tw8bGTRwyUbV8sK1O+UYD2S/CMniN51lN0hmBAXU0eXoP9Zf lqxA== X-Gm-Message-State: AOJu0YzV5iYdfqisI9H+akcYxwfap6lbndQobVTZvt/3psTVC88EdBou 4CZK5Vqe60R7fbysnM5ZJLdk9+J3yr15dS3FCBewng== X-Google-Smtp-Source: AGHT+IEvK4516vk3XLxXezj4Z/70DNzO/HNov8XwzTHQc2CtYhog8FQf/viaaqr3v8HfCYx/WX8PeA== X-Received: by 2002:a05:600c:418a:b0:3fe:d637:7b25 with SMTP id p10-20020a05600c418a00b003fed6377b25mr25010263wmh.0.1699354565264; Tue, 07 Nov 2023 02:56:05 -0800 (PST) Received: from carbon-x1.. ([2a01:e0a:999:a3a0:7db3:bdd9:4cab:2ee3]) by smtp.gmail.com with ESMTPSA id n30-20020a05600c501e00b00405442edc69sm15396853wmr.14.2023.11.07.02.56.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 02:56:04 -0800 (PST) From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Palmer Dabbelt , Paul Walmsley , Rob Herring , Krzysztof Kozlowski , Albert Ou , Jonathan Corbet , Andrew Jones , Evan Green , Conor Dooley , Samuel Ortiz Subject: [PATCH v3 04/20] riscv: hwprobe: add support for scalar crypto ISA extensions Date: Tue, 7 Nov 2023 11:55:40 +0100 Message-ID: <20231107105556.517187-5-cleger@rivosinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231107105556.517187-1-cleger@rivosinc.com> References: <20231107105556.517187-1-cleger@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231107_025607_929409_EED4F319 X-CRM114-Status: GOOD ( 10.79 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Export the following scalar crypto extensions through hwprobe: - Zbkb - Zbkc - Zbkx - Zknd - Zkne - Zknh - Zksed - Zksh - Zkt Signed-off-by: Clément Léger --- Documentation/arch/riscv/hwprobe.rst | 27 +++++++++++++++++++++++++++ arch/riscv/include/uapi/asm/hwprobe.h | 9 +++++++++ arch/riscv/kernel/sys_riscv.c | 9 +++++++++ 3 files changed, 45 insertions(+) diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst index ecc0307c107e..b020b2d35a99 100644 --- a/Documentation/arch/riscv/hwprobe.rst +++ b/Documentation/arch/riscv/hwprobe.rst @@ -80,6 +80,33 @@ The following keys are defined: * :c:macro:`RISCV_HWPROBE_EXT_ZBC` The Zbc extension is supported, as defined in version 1.0 of the Bit-Manipulation ISA extensions. + * :c:macro:`RISCV_HWPROBE_EXT_ZBKB` The Zbkb extension is supported, as + defined in version 1.0 of the Scalar Crypto ISA extensions. + + * :c:macro:`RISCV_HWPROBE_EXT_ZBKC` The Zbkc extension is supported, as + defined in version 1.0 of the Scalar Crypto ISA extensions. + + * :c:macro:`RISCV_HWPROBE_EXT_ZBKX` The Zbkx extension is supported, as + defined in version 1.0 of the Scalar Crypto ISA extensions. + + * :c:macro:`RISCV_HWPROBE_EXT_ZKND` The Zknd extension is supported, as + defined in version 1.0 of the Scalar Crypto ISA extensions. + + * :c:macro:`RISCV_HWPROBE_EXT_ZKNE` The Zkne extension is supported, as + defined in version 1.0 of the Scalar Crypto ISA extensions. + + * :c:macro:`RISCV_HWPROBE_EXT_ZKNH` The Zknh extension is supported, as + defined in version 1.0 of the Scalar Crypto ISA extensions. + + * :c:macro:`RISCV_HWPROBE_EXT_ZKSED` The Zksed extension is supported, as + defined in version 1.0 of the Scalar Crypto ISA extensions. + + * :c:macro:`RISCV_HWPROBE_EXT_ZKSH` The Zksh extension is supported, as + defined in version 1.0 of the Scalar Crypto ISA extensions. + + * :c:macro:`RISCV_HWPROBE_EXT_ZKT` The Zkt extension is supported, as defined + in version 1.0 of the Scalar Crypto ISA extensions. + * :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance information about the selected set of processors. diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h index dcef5c33c009..10bf543de3ce 100644 --- a/arch/riscv/include/uapi/asm/hwprobe.h +++ b/arch/riscv/include/uapi/asm/hwprobe.h @@ -30,6 +30,15 @@ struct riscv_hwprobe { #define RISCV_HWPROBE_EXT_ZBB (1 << 4) #define RISCV_HWPROBE_EXT_ZBS (1 << 5) #define RISCV_HWPROBE_EXT_ZBC (1 << 6) +#define RISCV_HWPROBE_EXT_ZBKB (1 << 7) +#define RISCV_HWPROBE_EXT_ZBKC (1 << 8) +#define RISCV_HWPROBE_EXT_ZBKX (1 << 9) +#define RISCV_HWPROBE_EXT_ZKND (1 << 10) +#define RISCV_HWPROBE_EXT_ZKNE (1 << 11) +#define RISCV_HWPROBE_EXT_ZKNH (1 << 12) +#define RISCV_HWPROBE_EXT_ZKSED (1 << 13) +#define RISCV_HWPROBE_EXT_ZKSH (1 << 14) +#define RISCV_HWPROBE_EXT_ZKT (1 << 15) #define RISCV_HWPROBE_KEY_CPUPERF_0 5 #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0) diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c index 382cd71129c6..bb44592707a5 100644 --- a/arch/riscv/kernel/sys_riscv.c +++ b/arch/riscv/kernel/sys_riscv.c @@ -163,6 +163,15 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, CHECK_ISA_EXT(ZBB); CHECK_ISA_EXT(ZBS); CHECK_ISA_EXT(ZBC); + CHECK_ISA_EXT(ZBKB); + CHECK_ISA_EXT(ZBKC); + CHECK_ISA_EXT(ZBKX); + CHECK_ISA_EXT(ZKND); + CHECK_ISA_EXT(ZKNE); + CHECK_ISA_EXT(ZKNH); + CHECK_ISA_EXT(ZKSED); + CHECK_ISA_EXT(ZKSH); + CHECK_ISA_EXT(ZKT); #undef CHECK_ISA_EXT }