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[v4,11/20] dt-bindings: riscv: add Zfh[min] ISA extensions description

Message ID 20231114141256.126749-12-cleger@rivosinc.com (mailing list archive)
State Accepted
Commit 6853ab83405ca1d9ec7114e7ab2a14c40fa724b4
Headers show
Series riscv: report more ISA extensions through hwprobe | expand

Checks

Context Check Description
conchuod/vmtest-for-next-PR fail PR summary
conchuod/patch-11-test-1 success .github/scripts/patches/build_rv32_defconfig.sh
conchuod/patch-11-test-2 success .github/scripts/patches/build_rv64_clang_allmodconfig.sh
conchuod/patch-11-test-3 success .github/scripts/patches/build_rv64_gcc_allmodconfig.sh
conchuod/patch-11-test-4 success .github/scripts/patches/build_rv64_nommu_k210_defconfig.sh
conchuod/patch-11-test-5 success .github/scripts/patches/build_rv64_nommu_virt_defconfig.sh
conchuod/patch-11-test-6 success .github/scripts/patches/checkpatch.sh
conchuod/patch-11-test-7 success .github/scripts/patches/dtb_warn_rv64.sh
conchuod/patch-11-test-8 success .github/scripts/patches/header_inline.sh
conchuod/patch-11-test-9 success .github/scripts/patches/kdoc.sh
conchuod/patch-11-test-10 success .github/scripts/patches/module_param.sh
conchuod/patch-11-test-11 success .github/scripts/patches/verify_fixes.sh
conchuod/patch-11-test-12 success .github/scripts/patches/verify_signedoff.sh

Commit Message

Clément Léger Nov. 14, 2023, 2:12 p.m. UTC
Add description of Zfh[min] ISA extensions[1].

Link: https://drive.google.com/file/d/1z3tQQLm5ALsAD77PM0l0CHnapxWCeVzP/view [1]
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
 .../devicetree/bindings/riscv/extensions.yaml       | 13 +++++++++++++
 1 file changed, 13 insertions(+)
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index e845e461b6e1..f3c99e69619b 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -214,6 +214,19 @@  properties:
             instructions as ratified at commit 6d33919 ("Merge pull request #158
             from hirooih/clmul-fix-loop-end-condition") of riscv-bitmanip.
 
+        - const: zfh
+          description:
+            The standard Zfh extension for 16-bit half-precision binary
+            floating-point instructions, as ratified in commit 64074bc ("Update
+            version numbers for Zfh/Zfinx") of riscv-isa-manual.
+
+        - const: zfhmin
+          description:
+            The standard Zfhmin extension which provides minimal support for
+            16-bit half-precision binary floating-point instructions, as ratified
+            in commit 64074bc ("Update version numbers for Zfh/Zfinx") of
+            riscv-isa-manual.
+
         - const: zk
           description:
             The standard Zk Standard Scalar cryptography extension as ratified