diff mbox series

[v4,19/20] riscv: hwprobe: export Zfa ISA extension

Message ID 20231114141256.126749-20-cleger@rivosinc.com (mailing list archive)
State Accepted
Commit f838a77a4881aa8c061e20977b5e1750cddc6b85
Headers show
Series riscv: report more ISA extensions through hwprobe | expand

Checks

Context Check Description
conchuod/vmtest-fixes-PR fail merge-conflict
conchuod/vmtest-for-next-PR fail PR summary
conchuod/patch-19-test-1 success .github/scripts/patches/build_rv32_defconfig.sh
conchuod/patch-19-test-2 success .github/scripts/patches/build_rv64_clang_allmodconfig.sh
conchuod/patch-19-test-3 success .github/scripts/patches/build_rv64_gcc_allmodconfig.sh
conchuod/patch-19-test-4 success .github/scripts/patches/build_rv64_nommu_k210_defconfig.sh
conchuod/patch-19-test-5 success .github/scripts/patches/build_rv64_nommu_virt_defconfig.sh
conchuod/patch-19-test-6 warning .github/scripts/patches/checkpatch.sh
conchuod/patch-19-test-7 success .github/scripts/patches/dtb_warn_rv64.sh
conchuod/patch-19-test-8 success .github/scripts/patches/header_inline.sh
conchuod/patch-19-test-9 success .github/scripts/patches/kdoc.sh
conchuod/patch-19-test-10 success .github/scripts/patches/module_param.sh
conchuod/patch-19-test-11 success .github/scripts/patches/verify_fixes.sh
conchuod/patch-19-test-12 success .github/scripts/patches/verify_signedoff.sh

Commit Message

Clément Léger Nov. 14, 2023, 2:12 p.m. UTC
Export Zfa ISA extension[1] through hwprobe.

Link: https://drive.google.com/file/d/1VT6QIggpb59-8QRV266dEE4T8FZTxGq4/view [1]
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Evan Green <evan@rivosinc.com>
---
 Documentation/arch/riscv/hwprobe.rst  | 4 ++++
 arch/riscv/include/uapi/asm/hwprobe.h | 1 +
 arch/riscv/kernel/sys_riscv.c         | 1 +
 3 files changed, 6 insertions(+)
diff mbox series

Patch

diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst
index 896ecfbbe5f4..41463b932268 100644
--- a/Documentation/arch/riscv/hwprobe.rst
+++ b/Documentation/arch/riscv/hwprobe.rst
@@ -157,6 +157,10 @@  The following keys are defined:
        defined in the RISC-V Vector manual starting from commit e2ccd0548d6c
        ("Remove draft warnings from Zvfh[min]").
 
+  * :c:macro:`RISCV_HWPROBE_EXT_ZFA`: The Zfa extension is supported as
+       defined in the RISC-V ISA manual starting from commit 056b6ff467c7
+       ("Zfa is ratified").
+
 * :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance
   information about the selected set of processors.
 
diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h
index fffc69d9f6ba..91fbe1a7f2e2 100644
--- a/arch/riscv/include/uapi/asm/hwprobe.h
+++ b/arch/riscv/include/uapi/asm/hwprobe.h
@@ -55,6 +55,7 @@  struct riscv_hwprobe {
 #define		RISCV_HWPROBE_EXT_ZIHINTNTL	(1 << 29)
 #define		RISCV_HWPROBE_EXT_ZVFH		(1 << 30)
 #define		RISCV_HWPROBE_EXT_ZVFHMIN	(1 << 31)
+#define		RISCV_HWPROBE_EXT_ZFA		(1ULL << 32)
 #define RISCV_HWPROBE_KEY_CPUPERF_0	5
 #define		RISCV_HWPROBE_MISALIGNED_UNKNOWN	(0 << 0)
 #define		RISCV_HWPROBE_MISALIGNED_EMULATED	(1 << 0)
diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c
index e90537593f5f..f0bd7b480b7f 100644
--- a/arch/riscv/kernel/sys_riscv.c
+++ b/arch/riscv/kernel/sys_riscv.c
@@ -193,6 +193,7 @@  static void hwprobe_isa_ext0(struct riscv_hwprobe *pair,
 		if (has_fpu()) {
 			EXT_KEY(ZFH);
 			EXT_KEY(ZFHMIN);
+			EXT_KEY(ZFA);
 		}
 #undef EXT_KEY
 	}