From patchwork Tue Dec 26 05:38:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sia Jee Heng X-Patchwork-Id: 13504789 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5149CC46CD3 for ; Tue, 26 Dec 2023 05:40:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LLAloS2lttubufatPWlUU+oEYyJm++K4GxdHMQLc+VY=; b=xWphCuUf3FZ+Ut rOy463hLtqCJ5NqHnXWsLlR+W05ES0cPoquWlpVqi89wM9bGCxbWZ+Ea5sYSAGM+StNUjyh1xe6ch 5LRQsz8B/0zMhf3sLawH4iItv8+2+7wBKTOUIXBS5X8arPdS7TbbEFnqbpQvi9rlq2Y4+NI5jCl+w 5pHHZO/eAJotv5pzdS1Hh8H6fwoooXtgLclZWboaytPPzdifJzQ0dxthWzjHfXETQFKaZi5feSOKs h4p3T2tWkvEHfxsx1VM+im39uxloj7U2jBa7UPYS7CuNPYEjkmGQeDMVNqxJKk3IY0EVLs2UEfzmk wB6GepIDYWRdqAJrZf1Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rI0BC-00BjLO-3B; Tue, 26 Dec 2023 05:40:38 +0000 Received: from fd01.gateway.ufhost.com ([61.152.239.71]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rI0B4-00BjC8-1E for linux-riscv@lists.infradead.org; Tue, 26 Dec 2023 05:40:37 +0000 Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id C7AC4807C; Tue, 26 Dec 2023 13:40:15 +0800 (CST) Received: from EXMBX066.cuchost.com (172.16.7.66) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 26 Dec 2023 13:40:15 +0800 Received: from jsia-virtual-machine.localdomain (202.188.176.82) by EXMBX066.cuchost.com (172.16.6.66) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 26 Dec 2023 13:40:09 +0800 From: Sia Jee Heng To: , , , , , , , , , , , , CC: , , , , , Subject: [RFC 11/16] dt-bindings: clock: Add StarFive JH8100 South-West clock and reset generator Date: Tue, 26 Dec 2023 13:38:43 +0800 Message-ID: <20231226053848.25089-12-jeeheng.sia@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231226053848.25089-1-jeeheng.sia@starfivetech.com> References: <20231226053848.25089-1-jeeheng.sia@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [202.188.176.82] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX066.cuchost.com (172.16.6.66) X-YovoleRuleAgent: yovoleflag X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231225_214035_555223_9754BA06 X-CRM114-Status: GOOD ( 12.61 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add bindings for the South-West clock and reset generator (SWCRG) on JH8100 SoC. Signed-off-by: Sia Jee Heng Reviewed-by: Ley Foon Tan Reviewed-by: Krzysztof Kozlowski --- .../bindings/clock/starfive,jh8100-swcrg.yaml | 64 +++++++++++++++++++ .../dt-bindings/clock/starfive,jh8100-crg.h | 12 ++++ .../dt-bindings/reset/starfive,jh8100-crg.h | 8 +++ 3 files changed, 84 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh8100-swcrg.yaml diff --git a/Documentation/devicetree/bindings/clock/starfive,jh8100-swcrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh8100-swcrg.yaml new file mode 100644 index 000000000000..287dff7e91e3 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/starfive,jh8100-swcrg.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/starfive,jh8100-swcrg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive JH8100 South-West Clock And Reset Generator + +maintainers: + - Sia Jee Heng + +properties: + compatible: + const: starfive,jh8100-swcrg + + reg: + maxItems: 1 + + clocks: + items: + - description: APB_BUS clock from SYSCRG + - description: VDEC_ROOT clock from SYSCRG + - description: FLEXNOC1 clock from SYSCRG + + clock-names: + items: + - const: apb_bus + - const: vdec_root + - const: flexnoc1 + + '#clock-cells': + const: 1 + description: + See for valid indices. + + '#reset-cells': + const: 1 + description: + See for valid indices. + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + - '#reset-cells' + +additionalProperties: false + +examples: + - | + #include + + clock-controller@12720000 { + compatible = "starfive,jh8100-swcrg"; + reg = <0x12720000 0x10000>; + clocks = <&syscrg JH8100_SYSCLK_APB_BUS>, + <&syscrg JH8100_SYSCLK_VDEC_ROOT>, + <&syscrg JH8100_SYSCLK_FLEXNOC1>; + clock-names = "apb_bus", "vdec_root", "flexnoc1"; + #clock-cells = <1>; + #reset-cells = <1>; + }; diff --git a/include/dt-bindings/clock/starfive,jh8100-crg.h b/include/dt-bindings/clock/starfive,jh8100-crg.h index c37b42f3eacd..7b337c1495be 100644 --- a/include/dt-bindings/clock/starfive,jh8100-crg.h +++ b/include/dt-bindings/clock/starfive,jh8100-crg.h @@ -339,4 +339,16 @@ #define JH8100_NECLK_CAN1_ICG_EN 173 #define JH8100_NECLK_SMBUS0_ICG_EN 174 +/* SWCRG clocks */ +#define JH8100_SWCLK_JPEG_AXI 0 +#define JH8100_SWCLK_VC9000DJ_AXI 1 +#define JH8100_SWCLK_VC9000DJ_VDEC 2 +#define JH8100_SWCLK_VC9000DJ_APB 3 +#define JH8100_SWCLK_VDEC_AXI 4 +#define JH8100_SWCLK_VC9000D_AXI 5 +#define JH8100_SWCLK_VC9000D_VDEC 6 +#define JH8100_SWCLK_VC9000D_APB 7 +#define JH8100_SWCLK_JPEG_ICG_EN 8 +#define JH8100_SWCLK_VDEC_ICG_EN 9 + #endif /* __DT_BINDINGS_CLOCK_STARFIVE_JH8100_H__ */ diff --git a/include/dt-bindings/reset/starfive,jh8100-crg.h b/include/dt-bindings/reset/starfive,jh8100-crg.h index 30a99c78341a..de4f25dc301d 100644 --- a/include/dt-bindings/reset/starfive,jh8100-crg.h +++ b/include/dt-bindings/reset/starfive,jh8100-crg.h @@ -91,4 +91,12 @@ #define JH8100_NERST_SYS_IOMUX_E 48 #define JH8100_NERST_DUBHE_TVSENSOR 49 +/* + * SWCRG resets: assert0 + */ +#define JH8100_SWRST_PRESETN 0 +#define JH8100_SWRST_VC9000DJ 1 +#define JH8100_SWRST_VC9000D 2 +#define JH8100_SWRST_DDR_TVSENSOR 3 + #endif /* __DT_BINDINGS_RESET_STARFIVE_JH8100_H__ */