Message ID | 20240312-fencei-v12-1-0f340f004ce7@rivosinc.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show
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Series |
riscv: Create and document PR_RISCV_SET_ICACHE_FLUSH_CTX prctl
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diff --git a/arch/riscv/include/asm/irqflags.h b/arch/riscv/include/asm/irqflags.h index 08d4d6a5b7e9..6fd8cbfcfcc7 100644 --- a/arch/riscv/include/asm/irqflags.h +++ b/arch/riscv/include/asm/irqflags.h @@ -7,7 +7,6 @@ #ifndef _ASM_RISCV_IRQFLAGS_H #define _ASM_RISCV_IRQFLAGS_H -#include <asm/processor.h> #include <asm/csr.h> /* read interrupt enabled status */