From patchwork Thu Mar 21 08:50:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 13598521 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 17A8EC54E68 for ; Thu, 21 Mar 2024 08:51:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ifsJ8oTfLyoPA4W4VuHSClGHwr9LdwmLGcF+HQl21uo=; b=SR3PXav0TieybG uzjHyR/r+BKCYPqt8jbzePuszyDwbCfEk2MAqAftZpUumcJ8Mnm2r48rg6tC3lbU/UUImpfN4ATL7 deK1duzG4T37viYqyJY2SrMc/XniqY+TxGJUcsi6IYVBezzJv1lR+4ZVjuqiQ3NhjndmLA30xeVBt CrvpEq8ZYtrMF29KSdP41Q0PesnCwRn3YgfzoWPmu6VrJb+kq1KIwkEnJsFK7pGnbaBM3zkIFV6Eb DgA5obJFzgTCoQXm4lyiTaTNtp+U6Z2hy2UOmOawHJ3xFfIr+JE8X/EL315BT9n68d/t8AgsLNqPN 7bSMI9fXWor+9h7R9z6w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rnE8k-00000002OO2-22l8; Thu, 21 Mar 2024 08:51:10 +0000 Received: from mail-oi1-x235.google.com ([2607:f8b0:4864:20::235]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rnE8g-00000002OLG-3JcY for linux-riscv@lists.infradead.org; Thu, 21 Mar 2024 08:51:08 +0000 Received: by mail-oi1-x235.google.com with SMTP id 5614622812f47-3c3ac720bceso246564b6e.3 for ; Thu, 21 Mar 2024 01:51:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1711011065; x=1711615865; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=aqNG2RpJPlr1g6cb+Y3gz6tpiaBtzhG+qVD6/FBVn0g=; b=EgGVE/ZyKroAPSbPrkXwRh+vaVzoaYuEifXBY7508/KmDsYX6ewCmY9rS5/USDwYqe 63qlKX5HXgJAOlpkEXXkkpJD/cUnqzgfHYLF6wEb/qvpQjjqNoL4mNbGLQPtoXycIgFW iKcYBrmf7AgTpmCYA68t0dZs+03mJbDW4S9gLdZbI6Mqk25CZFnXP0vuig14y1eLTuGw oyjmih4V8bq7ZDiijxzuKW5FVWm745DE4MytaTB6fgdRgS0LzajpxjHDXR5CbklyGCiK yQYBOvUJ7sSru+E4qjsALD79Gaa+GsQnrF/2MlEfOgipjDmfLqixmGljoZoZrhBEGctN QiBA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711011065; x=1711615865; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aqNG2RpJPlr1g6cb+Y3gz6tpiaBtzhG+qVD6/FBVn0g=; b=XFh/ivi/vD5PvOPCFOZTKC6tmcR7qGfGtK+qpaOdVTASk0VajIQ6PRT48myrf8JHov 9mJBlOL18ruNRe380AvLd0nGiOybH8IndKMOF2j8hLAM17hux/E+aL4gNcxhEbeiWb/L /HWT8ApRXDhD07HJbDMUKKFlxBI+xfkAq/De4rruh/NKVdi7u+b37WQhpJoHMDyIm8I0 1HuYlW+EhBuwmx+ZeNDLtyz7BIzuYNZN+g7hKmKwV1GEiEUGF/2qdeVW/waDCVgePAtx 0VU0U29BvO3ZH7WubNmVpq1bEVRZQEuaaidEWHcnHc85CumO53bmeYnicz4ThivtPQvO c/lw== X-Forwarded-Encrypted: i=1; AJvYcCVgTs10mLALmGueV/1+SGKinQQ5pJugB9vHHnPfp8Xc4qsmcCOa1HQVWdb16TV7GlNaf6yC+HUh+0HXk3OqC1QbDnQx2SAqkVE5Umc2LRYq X-Gm-Message-State: AOJu0YwY4G0SRm0+MthD9UWhLFRVoWklmnBBLB+s8S/X52NPFcsEiYKq 2kXQg9aHZ2U0tZysGQFV8m8MPvUgeiG48IogrRaLkaCozm3QGsAhk3qYzZd0Dow= X-Google-Smtp-Source: AGHT+IHwDM9ixAq9INkO3i418iZWmEpmXTd0fk8UuLCRGi37vLFEzQGRGixGXgfcb4sMkROFJd9img== X-Received: by 2002:a05:6808:2102:b0:3c3:980d:3700 with SMTP id r2-20020a056808210200b003c3980d3700mr1825504oiw.8.1711011065475; Thu, 21 Mar 2024 01:51:05 -0700 (PDT) Received: from anup-ubuntu-vm.localdomain ([103.97.165.210]) by smtp.gmail.com with ESMTPSA id x3-20020a544003000000b003c3753dd869sm2275409oie.58.2024.03.21.01.51.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Mar 2024 01:51:05 -0700 (PDT) From: Anup Patel To: Paolo Bonzini , Atish Patra Cc: Palmer Dabbelt , Paul Walmsley , Andrew Jones , Anup Patel , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel Subject: [PATCH 2/2] RISC-V: KVM: Fix APLIC in_clrip[x] read emulation Date: Thu, 21 Mar 2024 14:20:41 +0530 Message-Id: <20240321085041.1955293-3-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240321085041.1955293-1-apatel@ventanamicro.com> References: <20240321085041.1955293-1-apatel@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240321_015106_988776_7910652C X-CRM114-Status: GOOD ( 11.05 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The reads to APLIC in_clrip[x] registers returns rectified input values of the interrupt sources. A rectified input value of an interrupt source is defined by the section "4.5.2 Source configurations (sourcecfg[1]–sourcecfg[1023])" of the RISC-V AIA specification as: rectified input value = (incoming wire value) XOR (source is inverted) Update the riscv_aplic_input() implementation to match the above. Fixes: 74967aa208e2 ("RISC-V: KVM: Add in-kernel emulation of AIA APLIC") Signed-off-by: Anup Patel --- arch/riscv/kvm/aia_aplic.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/arch/riscv/kvm/aia_aplic.c b/arch/riscv/kvm/aia_aplic.c index 5e842b92dc46..b467ba5ed910 100644 --- a/arch/riscv/kvm/aia_aplic.c +++ b/arch/riscv/kvm/aia_aplic.c @@ -197,16 +197,31 @@ static void aplic_write_enabled(struct aplic *aplic, u32 irq, bool enabled) static bool aplic_read_input(struct aplic *aplic, u32 irq) { - bool ret; - unsigned long flags; + u32 sourcecfg, sm, raw_input, irq_inverted; struct aplic_irq *irqd; + unsigned long flags; + bool ret = false; if (!irq || aplic->nr_irqs <= irq) return false; irqd = &aplic->irqs[irq]; raw_spin_lock_irqsave(&irqd->lock, flags); - ret = (irqd->state & APLIC_IRQ_STATE_INPUT) ? true : false; + + sourcecfg = irqd->sourcecfg; + if (sourcecfg & APLIC_SOURCECFG_D) + goto skip; + + sm = sourcecfg & APLIC_SOURCECFG_SM_MASK; + if (sm == APLIC_SOURCECFG_SM_INACTIVE) + goto skip; + + raw_input = (irqd->state & APLIC_IRQ_STATE_INPUT) ? 1 : 0; + irq_inverted = (sm == APLIC_SOURCECFG_SM_LEVEL_LOW || + sm == APLIC_SOURCECFG_SM_EDGE_FALL) ? 1 : 0; + ret = !!(raw_input ^ irq_inverted); + +skip: raw_spin_unlock_irqrestore(&irqd->lock, flags); return ret;