From patchwork Thu Mar 28 09:18:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Minda Chen X-Patchwork-Id: 13608264 X-Patchwork-Delegate: mail@conchuod.ie Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AAE17C54E67 for ; Thu, 28 Mar 2024 09:20:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=SlzRoNzGT0FQNapRztbQjA8pgqBLeZGTBXCUudBaUhI=; b=pwBoCwdqKuPYi5 9aBufQZiIVQU3VkpE07slZ5QxrUPxXfRDRYEiTbUTkBeFjKYXlRS9DxqK45j33ihI9kmGgpwUlH1d /Mf0y8cnm8wvsswxGmidL9WnsVyvXK/eTR2CJvZXBj0j4wnuNzAxiCLrxf56If9/5bv7J2VJlqRX7 yZKkagg55nMKdnA4t/sbPcBPlZiKEIvwaESiE8dAOYBEWG8ML/QX0NZeUAT1zhFLWqNvy6xmyUQ9u 0V1m5eCIiohC8qkmCY7b4tLfEQk6IxLb+gWlIGdxBFtdSHTxLB+a5yT40xPhxU2h8vndDc4N717+R tOwGUwfXzdZ4YgrxeXJA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rplvx-0000000DIH2-4C5y; Thu, 28 Mar 2024 09:20:30 +0000 Received: from mail-sh0chn02on2071c.outbound.protection.partner.outlook.cn ([2406:e500:4420:2::71c] helo=CHN02-SH0-obe.outbound.protection.partner.outlook.cn) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rpluu-0000000DHIh-2HJD for linux-riscv@lists.infradead.org; Thu, 28 Mar 2024 09:19:27 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=g6ZL1qdptdWnC3bAdep9MEHpCsjda2xSYQXWWFXxvMak/Ht9yVKEeUjWP38CDGg8tYiBW8uZbM4fm57GJFn/mES4YNbUufDWvtky3wZB6ilhffZIEPKjWwixSRWtUJ2Pa+RN+92quL6V3ghoY2fBhSOMjanXlRNnlnl6RKIzdM/2vdjys5OPi70w6TeofopIw1V3DpblFgabOcDCvVfSwfYSeRw+f8ZYWG9Qb1373dv1llrwP7qGaq5uRJGPBF3pg5Nnoy0YlqxjfO59CJjFXkh3i6tf6i2hjM6uQdeLOTf2znE0J/cQ7RXG7ffzv9/N5i8CKjRBSuiTqa9cIQ6A6g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=8l6vXchax9xswsBoSNeWzV2bcXMCqP+LE45edi0JlmA=; b=XcYD6CrXm3d7OofrtImmMXhbGrn+Q7atEPM3LGVjbvpCF9+vWHE3FBjXNg/lvnukF8OY0RuUV1+U0qneBl4v9tpZwn3kk/e60AoE7qQXHoi4e1QlOJlHkjdyI4hnKWgZhiyx7qsGdNDZ8p09P3I8xCuNTM+mBDclFSwdZmClto7hwjQvPJibcVY8vz2IVIKRqSr5XH/qszCD+0AGW5O7iVJq+JNFd40gpMl6ZqpIsUXJ5XJp5dW6TCT4yVlrp2+r1Kr7gF+2S7OzuxgEsQgG5af7IeTGg0fNjr9W1aWN3CyHXVc6yKO12wNh5FdIMBFAryZnFeAaWGHqNHwbA1fH2w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=starfivetech.com; dmarc=pass action=none header.from=starfivetech.com; dkim=pass header.d=starfivetech.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=starfivetech.com; Received: from SHXPR01MB0863.CHNPR01.prod.partner.outlook.cn (2406:e500:c311:25::15) by SHXPR01MB0559.CHNPR01.prod.partner.outlook.cn (2406:e500:c311:1d::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7409.32; Thu, 28 Mar 2024 09:19:06 +0000 Received: from SHXPR01MB0863.CHNPR01.prod.partner.outlook.cn ([fe80::c738:9e6b:f92e:8bb9]) by SHXPR01MB0863.CHNPR01.prod.partner.outlook.cn ([fe80::c738:9e6b:f92e:8bb9%6]) with mapi id 15.20.7409.031; Thu, 28 Mar 2024 09:19:06 +0000 From: Minda Chen To: Lorenzo Pieralisi , Conor Dooley , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Thomas Gleixner , Daire McNamara , Emil Renner Berthing , Krzysztof Kozlowski Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-pci@vger.kernel.org, Paul Walmsley , Palmer Dabbelt , Albert Ou , Philipp Zabel , Mason Huo , Leyfoon Tan , Kevin Xie , Minda Chen Subject: [PATCH v16 22/22] riscv: dts: starfive: add PCIe dts configuration for JH7110 Date: Thu, 28 Mar 2024 17:18:35 +0800 Message-Id: <20240328091835.14797-23-minda.chen@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240328091835.14797-1-minda.chen@starfivetech.com> References: <20240328091835.14797-1-minda.chen@starfivetech.com> X-ClientProxiedBy: NT0PR01CA0020.CHNPR01.prod.partner.outlook.cn (2406:e500:c510:c::16) To SHXPR01MB0863.CHNPR01.prod.partner.outlook.cn (2406:e500:c311:25::15) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SHXPR01MB0863:EE_|SHXPR01MB0559:EE_ X-MS-Office365-Filtering-Correlation-Id: 804246d0-148f-4758-744a-08dc4f081de8 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: z7fcDM8MOXQTFSBXfR1eFiTPaKLY9WfZK3mmBQKDTG2uaa/WIPkTLpx6lnyqlEEfoeYJf12lOOcMD0PDfD99y2vAsD41uvsRCub6q4C1kgKOQaHgiIcCWAwIponb8xAgQzATIW3iq8x46aRjVpeoCdgSol0SqOSpKRV7Oax/KoT9gz/5Sw+oJjS03kZl34NR/sjupGoKVYzDq89JYSEODEhljm4fevpukhN2el+e+IaGccw2C/P9AEj8gTK7+cOM2mJm92BfSiF5aoDem/lLgJRjIZaX7A+4hIIPA0RoiCjatjQDq1OlaHaUHv7vLASO877NG+WxWTOI/s+So0eT7MJH25loSZGG4ik2HVnHqeHYhz1Wltr3YW6VM+dWwu/1JP4e/K+cMkS55PGNaXxVbuMhN6Ih4DKkqU+2aJF6vIoVkf+TQ9CLQpiHeMswL04Z+Lldyii+nrllz4v+5RpVlCTgDSlXW2TbTq46fsHATNb6tQ1yyAI+QVSw/43KyyOBpYtCSCicEc6CnBJhNzZEC9ZMP3fDK65RQIbS0yS1642nUGqXbA3/QYzmzMWJizgd3vc/Wcfq+c8R2QfP9hstmZ29V3cjSrmvL70iCPFJI20MWTmO87vv4jwVH1UftZWW X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SHXPR01MB0863.CHNPR01.prod.partner.outlook.cn;PTR:;CAT:NONE;SFS:(13230031)(1800799015)(52116005)(7416005)(41320700004)(366007)(38350700005);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 0y8kVUYWIgVZqWuLZZfcg9Gb4KHOagVGqFacR0BvCU68aVdxHf6FJaXAowt/E3rKjkURlErmRZ94lMSnSydAHlbi6f6aQrOvI3m+kKvnVqqnQd3EN/nfUHdTGCTWqwN4CAyEPMd3/0Lgch1PIz9JDD1VJOS8HaBtNFYxhiyza4qOy3Kmtswdpv/gFnFQE9Fl++tMlw+D76+7ZDK+YF9acHgq/yURUJm/HTa87Seqpfuqrt3ug5WN8alfutSrlLQRWT8CI0qd47mwb2uPnE4+2SsmIc9vNYyx/xWKyKXWs5Idz3Ecknj8NFTtuo+h+aDKHBmpXYZX/HXLq2ieMEQa2HbZVkIZHmRQM2wuCR7tMEp/E+50xerpDdKtIm2rtm+tQ3S1jB6dbSo0uqO0zPIp1c76wFc0p4ewUH89pyndHeHP2kC3YkL/InyM3moPahAb+UtOv7olicKeOd1EXxVcgBeL/HUtlVaaOE0g7LECoEW4hhvbTm1gymFIIMvuIwbPvzFYDXQ6rGSuPAAAUJpcnoGs9P71aGZg1kbpRUjuc6LgFLraL7mIbEK52vdtAXrABiDzHIiq5gk5iOyEWVD9zMuxLWLutLZ5frPXfX2iITFCMi6tAAEsaTq2oa6tD5ICMYTiZfGbrMrJ/2HWLXOc9i4s8WahoLsfgD0tBe/QSsDGVrxegWEASvqldEPI+l6WWZ5QX99E9IYxV/qIBJV0e30qaj4bLWIo8xE7jcGD2adhP5MYYIXePUpKiPQVYHE/BtJ5VIcqvQ9r1/zbe+tghOoGxT3DGHgpJQ7QdIcMvBX3xxQN/Rj7ySIvUAv3SDjp9DogNZolsj0HuR3M8fwWYMLQrpW3BpQCZwa1/sOQ8VMZ7AnaNSouF7bA+jpPif0R6htai+Ui5KIu011+AZe37/EPE4w5yF9QMYF3pEQwMYBNPTT7yWn0uRd5dp1ZS8Tt6DQhaeI6IrAnPwx3yPYnkxWqSam9NYR0hi0pY33p+euLZljUIJczMFAHDhXUOhs86vWCVRT6KHN3lIVg2BBGOuU4wY/e3lsrzybnMW3r/s+7loPU5iJMOL2jFZcuZ3jKF1/vJYJ7SyBp/3S0A5Q9r8zHVRfoVMBpLFa7UClSGiLg/LRfGVd7RUTZPQQTrXG1d98XqxvCIsveRKOPAGlhcZKAFHbZmn8GKAuP92hiMSMUoxVeb3NGQwvs4o6rZWes22P6ykx+nXZX8mHElct5o/x8GGEWWoksNo9uELefcNvKp00z0gHMPx2YCPlIkPIgFUjHXaeS8okA0k9ws6Sdnq2Chv154U2qH6qvTRtY6bVKM4H6oLwg7j+YL7FPy0a1xZ0Y8YbmpcxbR5DQvClz2i+Fk8pINDJtbRnCGnTEmPlI8cD2g2dt6IxzGzzIzI9m4dpXDxLRc4oUNZX80i4+gTH/3yJdyQrNJqIAG5HijdL3DVYhNikPQ2wVgGzgSppCAT34OMcAlYfCYbJMKwWnixxrXXOmPHNW6LnbsP/+GR8vpO7lSWsdEetgNLQF9Ul22KcaKuJZnGns2rLJrGT62rJMoQja4VooPS79uSkj4JemWPfPUWzTXO0rqVD86DJKprbKZkK91EUZUbK0/s8Nkg== X-OriginatorOrg: starfivetech.com X-MS-Exchange-CrossTenant-Network-Message-Id: 804246d0-148f-4758-744a-08dc4f081de8 X-MS-Exchange-CrossTenant-AuthSource: SHXPR01MB0863.CHNPR01.prod.partner.outlook.cn X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Mar 2024 09:19:06.0941 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 06fe3fa3-1221-43d3-861b-5a4ee687a85c X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: YVAdtL2ONi/JmZ17M0+SgRiy+kO2KgwMaKQdcqdxT6OQeP0oLG6BEB/LjWGKUAsKa0eRYcrHmfSl3CRP5p1DQrNeB3bvt6x0Mf47UfRHs6Q= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SHXPR01MB0559 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240328_021924_919777_B0BE0B01 X-CRM114-Status: UNSURE ( 8.36 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add PCIe dts configuraion for JH7110 SoC platform. Signed-off-by: Minda Chen Reviewed-by: Hal Feng Signed-off-by: Minda Chen --- .../jh7110-starfive-visionfive-2.dtsi | 64 ++++++++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 86 +++++++++++++++++++ 2 files changed, 150 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index 45b58b6f3df8..de95e330a93c 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -330,6 +330,22 @@ status = "okay"; }; +&pcie0 { + perst-gpios = <&sysgpio 26 GPIO_ACTIVE_LOW>; + phys = <&pciephy0>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie0_pins>; + status = "okay"; +}; + +&pcie1 { + perst-gpios = <&sysgpio 28 GPIO_ACTIVE_LOW>; + phys = <&pciephy1>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie1_pins>; + status = "okay"; +}; + &pwmdac { pinctrl-names = "default"; pinctrl-0 = <&pwmdac_pins>; @@ -552,6 +568,54 @@ }; }; + pcie0_pins: pcie0-0 { + clkreq-pins { + pinmux = ; + bias-pull-down; + drive-strength = <2>; + input-enable; + input-schmitt-disable; + slew-rate = <0>; + }; + + wake-pins { + pinmux = ; + bias-pull-up; + drive-strength = <2>; + input-enable; + input-schmitt-disable; + slew-rate = <0>; + }; + }; + + pcie1_pins: pcie1-0 { + clkreq-pins { + pinmux = ; + bias-pull-down; + drive-strength = <2>; + input-enable; + input-schmitt-disable; + slew-rate = <0>; + }; + + wake-pins { + pinmux = ; + bias-pull-up; + drive-strength = <2>; + input-enable; + input-schmitt-disable; + slew-rate = <0>; + }; + }; + pwmdac_pins: pwmdac-0 { pwmdac-pins { pinmux = ; power-domains = <&pwrc JH7110_PD_VOUT>; }; + + pcie0: pcie@940000000 { + compatible = "starfive,jh7110-pcie"; + reg = <0x9 0x40000000 0x0 0x1000000>, + <0x0 0x2b000000 0x0 0x100000>; + reg-names = "cfg", "apb"; + linux,pci-domain = <0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x82000000 0x0 0x30000000 0x0 0x30000000 0x0 0x08000000>, + <0xc3000000 0x9 0x00000000 0x9 0x00000000 0x0 0x40000000>; + interrupts = <56>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc0 0x1>, + <0x0 0x0 0x0 0x2 &pcie_intc0 0x2>, + <0x0 0x0 0x0 0x3 &pcie_intc0 0x3>, + <0x0 0x0 0x0 0x4 &pcie_intc0 0x4>; + msi-controller; + device_type = "pci"; + starfive,stg-syscon = <&stg_syscon>; + bus-range = <0x0 0xff>; + clocks = <&syscrg JH7110_SYSCLK_NOC_BUS_STG_AXI>, + <&stgcrg JH7110_STGCLK_PCIE0_TL>, + <&stgcrg JH7110_STGCLK_PCIE0_AXI_MST0>, + <&stgcrg JH7110_STGCLK_PCIE0_APB>; + clock-names = "noc", "tl", "axi_mst0", "apb"; + resets = <&stgcrg JH7110_STGRST_PCIE0_AXI_MST0>, + <&stgcrg JH7110_STGRST_PCIE0_AXI_SLV0>, + <&stgcrg JH7110_STGRST_PCIE0_AXI_SLV>, + <&stgcrg JH7110_STGRST_PCIE0_BRG>, + <&stgcrg JH7110_STGRST_PCIE0_CORE>, + <&stgcrg JH7110_STGRST_PCIE0_APB>; + reset-names = "mst0", "slv0", "slv", "brg", + "core", "apb"; + status = "disabled"; + + pcie_intc0: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; + + pcie1: pcie@9c0000000 { + compatible = "starfive,jh7110-pcie"; + reg = <0x9 0xc0000000 0x0 0x1000000>, + <0x0 0x2c000000 0x0 0x100000>; + reg-names = "cfg", "apb"; + linux,pci-domain = <1>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x82000000 0x0 0x38000000 0x0 0x38000000 0x0 0x08000000>, + <0xc3000000 0x9 0x80000000 0x9 0x80000000 0x0 0x40000000>; + interrupts = <57>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc1 0x1>, + <0x0 0x0 0x0 0x2 &pcie_intc1 0x2>, + <0x0 0x0 0x0 0x3 &pcie_intc1 0x3>, + <0x0 0x0 0x0 0x4 &pcie_intc1 0x4>; + msi-controller; + device_type = "pci"; + starfive,stg-syscon = <&stg_syscon>; + bus-range = <0x0 0xff>; + clocks = <&syscrg JH7110_SYSCLK_NOC_BUS_STG_AXI>, + <&stgcrg JH7110_STGCLK_PCIE1_TL>, + <&stgcrg JH7110_STGCLK_PCIE1_AXI_MST0>, + <&stgcrg JH7110_STGCLK_PCIE1_APB>; + clock-names = "noc", "tl", "axi_mst0", "apb"; + resets = <&stgcrg JH7110_STGRST_PCIE1_AXI_MST0>, + <&stgcrg JH7110_STGRST_PCIE1_AXI_SLV0>, + <&stgcrg JH7110_STGRST_PCIE1_AXI_SLV>, + <&stgcrg JH7110_STGRST_PCIE1_BRG>, + <&stgcrg JH7110_STGRST_PCIE1_CORE>, + <&stgcrg JH7110_STGRST_PCIE1_APB>; + reset-names = "mst0", "slv0", "slv", "brg", + "core", "apb"; + status = "disabled"; + + pcie_intc1: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; }; };