From patchwork Wed Jul 31 04:04:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 13748052 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6ED0CC3DA7F for ; Wed, 31 Jul 2024 04:06:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rx7bCG0weWkfBATReUcyrQoT62//mIc0+/JfnfhCg60=; b=VCRR1Lqlo4xD+Z mCvn3BCbbdQFGGlZFVfgh9CcgHwYr3g4SKidCCrfnxrFq34yGJNRAk/p+PtHBXAnauGJJkJQhqdYY vigMDjEOH1/MogyfzqQXlNAkyMbn+NJfHYEg+Ac4G0irSpFFQcxa9a4gj1BTbk8m/jKtfKMVTHESj jV0Ix7pRoaGz33AaUj3kjEca5BNwJHCCY5WY506712dDC2XZieWRXT05J4f5VhG1qg76YK9jo+9GQ rKWhCpji9+k3ukOYJqG8dfne280/YB5lsH7mHYcqyeHcQVhxxXxmmeoASYKAwL3qyEJ56xFvcDWRL GMqe5XqA/+upLjCZwuaQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sZ0bP-0000000HEJp-3aPR; Wed, 31 Jul 2024 04:06:15 +0000 Received: from smtp21.cstnet.cn ([159.226.251.21] helo=cstnet.cn) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sZ0bM-0000000HEIa-2AZK for linux-riscv@lists.infradead.org; Wed, 31 Jul 2024 04:06:14 +0000 Received: from ubt.. (unknown [210.73.53.31]) by APP-01 (Coremail) with SMTP id qwCowAAnL0spuKlmWXZdAg--.7845S3; Wed, 31 Jul 2024 12:06:07 +0800 (CST) From: Chunyan Zhang To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrew Morton , Alexandre Ghiti Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Chunyan Zhang Subject: [PATCH V2 1/3] riscv: mm: Prepare for reuse PTE RSW bit(9) Date: Wed, 31 Jul 2024 12:04:42 +0800 Message-Id: <20240731040444.3384790-2-zhangchunyan@iscas.ac.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240731040444.3384790-1-zhangchunyan@iscas.ac.cn> References: <20240731040444.3384790-1-zhangchunyan@iscas.ac.cn> MIME-Version: 1.0 X-CM-TRANSID: qwCowAAnL0spuKlmWXZdAg--.7845S3 X-Coremail-Antispam: 1UD129KBjvJXoW7tw4UKF47uw1UGr13AFy5urg_yoW8AryDpF s0kr9YkFWrCrySkay2yFnFgr4UAa98K3sIgry8ur4UJas8t3yUZ39xKw17Xay8Xa1vvF93 GFWvg345ury3Jw7anT9S1TB71UUUUUDqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUPab7Iv0xC_Zr1lb4IE77IF4wAFF20E14v26ryj6rWUM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28IrcIa0xkI8VA2jI 8067AKxVWUGwA2048vs2IY020Ec7CjxVAFwI0_JFI_Gr1l8cAvFVAK0II2c7xJM28CjxkF 64kEwVA0rcxSw2x7M28EF7xvwVC0I7IYx2IY67AKxVW8JVW5JwA2z4x0Y4vE2Ix0cI8IcV CY1x0267AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2 jsIEc7CjxVAFwI0_GcCE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4 CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_JrI_JrylYx0Ex4A2jsIE14v26r4j6F4UMcvj eVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCY1x0262kKe7AKxVWUtVW8ZwCY02 Avz4vE14v_Gryl42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAq x4xG67AKxVWUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1q6r 43MIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_JFI_Gr1lIxAIcVC0I7IYx2IY6xkF 7I0E14v26r4j6F4UMIIF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxV WUJVW8JwCI42IY6I8E87Iv6xkF7I0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxU IasUDUUUU X-Originating-IP: [210.73.53.31] X-CM-SenderInfo: x2kd0wxfkx051dq6x2xfdvhtffof0/1tbiDAYPB2apgQWjrQAAsH X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240730_210613_024659_F817C95E X-CRM114-Status: GOOD ( 10.98 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The PTE bit(9) on RISC-V is reserved for software, it is used by DEVMAP now which has to be disabled if we want to use bit(9) for other features, since there's no more free PTE bit on RISC-V now. So to make ARCH_HAS_PTE_DEVMAP selectable, this patch uses it as the build condition of devmap definitions. Signed-off-by: Chunyan Zhang --- arch/riscv/include/asm/pgtable-64.h | 2 +- arch/riscv/include/asm/pgtable-bits.h | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/pgtable-64.h b/arch/riscv/include/asm/pgtable-64.h index 0897dd99ab8d..babb8d2b0f0b 100644 --- a/arch/riscv/include/asm/pgtable-64.h +++ b/arch/riscv/include/asm/pgtable-64.h @@ -398,7 +398,7 @@ static inline struct page *pgd_page(pgd_t pgd) #define p4d_offset p4d_offset p4d_t *p4d_offset(pgd_t *pgd, unsigned long address); -#ifdef CONFIG_TRANSPARENT_HUGEPAGE +#if defined(CONFIG_TRANSPARENT_HUGEPAGE) && defined(CONFIG_ARCH_HAS_PTE_DEVMAP) static inline int pte_devmap(pte_t pte); static inline pte_t pmd_pte(pmd_t pmd); diff --git a/arch/riscv/include/asm/pgtable-bits.h b/arch/riscv/include/asm/pgtable-bits.h index a8f5205cea54..5bcc73430829 100644 --- a/arch/riscv/include/asm/pgtable-bits.h +++ b/arch/riscv/include/asm/pgtable-bits.h @@ -19,7 +19,13 @@ #define _PAGE_SOFT (3 << 8) /* Reserved for software */ #define _PAGE_SPECIAL (1 << 8) /* RSW: 0x1 */ + +#ifdef CONFIG_ARCH_HAS_PTE_DEVMAP #define _PAGE_DEVMAP (1 << 9) /* RSW, devmap */ +#else +#define _PAGE_DEVMAP 0 +#endif /* CONFIG_ARCH_HAS_PTE_DEVMAP */ + #define _PAGE_TABLE _PAGE_PRESENT /*