From patchwork Wed Sep 4 00:27:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yixun Lan X-Patchwork-Id: 13789516 X-Patchwork-Delegate: mail@conchuod.ie Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 27513CD37B5 for ; Wed, 4 Sep 2024 00:28:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:To:In-Reply-To:References:Message-Id: MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=zQ6+IF5316xGNWu2r6U0a35U/PiHCARAfG1Y6uC0Gxo=; b=zq+B5x9Leya95n 9oOTo7BnrauFnpBmNeVpnX4XvPN6LVHoO4RY9fm5LglY/FGW9YVEtU4/1Bzh99OhE1KG7xqQPlqfa AUxaKMj7R3A2EI1LuGRRaBS4ssy7+z/ZgqxHs9Ry/+lrXsxfPDFoB4xbvp41o/azTEpx1qygdMmKx o5qnp/uFhoOePcbCbUlKR64cYl+G90KsC4ZeLut17bIkzl5NJmx/CIZOmNUfEZp7C9Z/mJZJWRCT/ DVWTZBlGdpn2cAK/ItwKfe/6e9K4TSahkxxN2/oRibBUxExkD41mzv1FFa//T4mz0qxDtUJBuqPBF jEJF6R6jtP3gHaWQ/CPQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sldsO-00000002NOg-2RQm; Wed, 04 Sep 2024 00:28:00 +0000 Received: from woodpecker.gentoo.org ([140.211.166.183] helo=smtp.gentoo.org) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sldsL-00000002NOB-12Ji for linux-riscv@lists.infradead.org; Wed, 04 Sep 2024 00:27:58 +0000 From: Yixun Lan Date: Wed, 04 Sep 2024 00:27:23 +0000 Subject: [PATCH 1/3] dt-bindings: gpio: spacemit: add support for K1 SoC MIME-Version: 1.0 Message-Id: <20240904-03-k1-gpio-v1-1-6072ebeecae0@gentoo.org> References: <20240904-03-k1-gpio-v1-0-6072ebeecae0@gentoo.org> In-Reply-To: <20240904-03-k1-gpio-v1-0-6072ebeecae0@gentoo.org> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=3255; i=dlan@gentoo.org; h=from:subject:message-id; bh=h5V7a9pxwmZDjwKd2MNAtQG9j5qokpi/xWv8XCnn2Xs=; b=owEBzQIy/ZANAwAKATGq6kdZTbvtAcsmYgBm16l55DAFqmnxhQWr0EaOvZhIceq5xWRq8etwf GqGV1GKIiSJApMEAAEKAH0WIQS1urjJwxtxFWcCI9wxqupHWU277QUCZtepeV8UgAAAAAAuAChp c3N1ZXItZnByQG5vdGF0aW9ucy5vcGVucGdwLmZpZnRoaG9yc2VtYW4ubmV0QjVCQUI4QzlDMzF CNzExNTY3MDIyM0RDMzFBQUVBNDc1OTREQkJFRAAKCRAxqupHWU277df9D/4/yQmgqpndfYf7wk U/3O/xumfLX10GuHYDS2jG3xgJGOOEgr1DgibtUOt6A1UboAZSVHk2DmHNmt+HDofeBlY6RqnWt rMlHPjR/w4qQwkRFbfK6B+TcZQK6orKztDYi0BZAet+E3Hq/9Q+3WClDxQssw6KnI1f7F/eJR/j oKNvJS2jf01iyptgRaADK8tdrfHKCsDsdAJiHfbc3jQeb9VID4slpk3ja4ADkniDoewq7c1/PXe 7UAUqxtjox8VJllGVETC7dDa1xV83xa69flLsqdwd/AsGgmB41UqgCykaZRTCELqZoCJu74Rhtw Hfgi/gvqeuwzY/1sprHt73VmEgKWUaS/u0hphLtzltwCbCvzftuHfowDBJPTSp49ZKsCXTOyii/ W9npoOjJhcCxapkJz5drbpzsjBpYOL0PTDOo1XqZpB7qtjo812ZjFPDj7lp0Un54/Q3B2t7UUOL gMA5yVTxsabmh4aKF06osZfvjjkzVePrwNabUiv9/zXjc8TWgWdoiPJNBJWUchEhvlRx2lC79gG bKCNNAVvnvLfaog6j9N72pCJ+ZTf8HwdSMeZNHD3H2j/6MjqQrv8ORxc2SxsYjDBC2PacyQSCE/ rulTI1K5T3+wXR6kPwCxVR2/notlf8jtZd6QAG42mJIf5UEqcrz98feAR179fGvAyYxw== X-Developer-Key: i=dlan@gentoo.org; a=openpgp; fpr=50B03A1A5CBCD33576EF8CD7920C0DBCAABEFD55 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240903_172757_347689_1D0D4C78 X-CRM114-Status: GOOD ( 14.06 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Yixun Lan , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Yangyu Chen , Meng Zhang , Jisheng Zhang , Inochi Amaoto , linux-riscv@lists.infradead.org, Meng Zhang Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The GPIO controller of K1 support basic functions as input/output, all pins can be used as interrupt which route to one IRQ line, trigger type can be select between rising edge, failing edge, or both. There are four GPIO banks, each consisting of 32 pins. Signed-off-by: Yixun Lan --- .../devicetree/bindings/gpio/spacemit,k1-gpio.yaml | 95 ++++++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml b/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml new file mode 100644 index 0000000000000..db2e62fb452fd --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/spacemit,k1-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SpacemiT K1 GPIO controller + +description: > + The controller's registers are organized as sets of eight 32-bit + registers with each set controlling a bank of up to 32 pins. A single + interrupt is shared for all of the banks handled by the controller. + +maintainers: + - Yixun Lan + +properties: + $nodename: + pattern: '^gpio@[0-9a-f]+$' + + compatible: + items: + - const: spacemit,k1-gpio + + reg: + maxItems: 1 + description: > + Define the base and range of the I/O address space containing + the SpacemiT K1 GPIO controller registers + + ranges: true + + "#gpio-cells": + const: 2 + description: > + The first cell is the pin number (within the controller's + pin space), and the second is used for the following: + bit[0]: polarity (0 for active-high, 1 for active-low) + + gpio-controller: true + + gpio-ranges: true + + interrupts: + maxItems: 1 + description: + The interrupt shared by all GPIO lines for this controller. + + interrupt-names: + items: + - const: gpio_mux + + "#interrupt-cells": + const: 2 + description: | + The first cell is the GPIO number, the second should specify + flags. The following subset of flags is supported: + - bits[3:0] trigger type flags (no level trigger type support) + 1 = low-to-high edge triggered + 2 = high-to-low edge triggered + Valid combinations are 1, 2, 3 + + interrupt-controller: true + +required: + - compatible + - reg + - gpio-controller + - '#gpio-cells' + - interrupts + - interrupt-names + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + gpio@d4019000 { + compatible = "spacemit,k1-gpio"; + reg = <0x0 0xd4019000 0x0 0x800>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <58>; + interrupt-names = "gpio_mux"; + interrupt-parent = <&plic>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&pinctrl 0 0 128>; + }; + };