From patchwork Wed Oct 2 10:47:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 13819605 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 36630CF31B0 for ; Wed, 2 Oct 2024 10:51:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=fS7PEqb+tMyO4aQB8li9l3+lKw2J77+kpDoY6nME/g8=; b=05Objw1z9AfN0U tu2WQ7u0BcwkLb/IkvG0QSKx2WhnOFozl8QDF2FRQp0SOhVbwH/pqtaaf8bc1rKPcfHo6k6ImSoTa FejL5uRwiVxChGUjVUeZgCSi3orBhARR+2o5o5F4xtCHMrXYrev/ULlPNmXfrdSzxTSHGv+i6tKzl TBBEjLcKJ52AQPniZewsheVaPF57cDMQhMghJYYo8Uon6k9y2BqVs3kM7sMZEOcFJNQ2lleBjuSIf yy38VYfr8vM0osdEw/JN+IAQ4RpAJVxYEngSPdZHQXUqGaw+yhdYqaR12HgIN2fqAKR0X8ALQjpgT YWpSv44ksvCITescXOjw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1svwwp-00000005Yct-3SAF; Wed, 02 Oct 2024 10:51:11 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1svwu0-00000005XmH-2zn4; Wed, 02 Oct 2024 10:48:18 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id D90B75C118E; Wed, 2 Oct 2024 10:48:11 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 25BA6C4CED2; Wed, 2 Oct 2024 10:48:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1727866095; bh=w1Hu48WwSe36hDwxxCLQSb4anYqbbgR4csAAzUyw8CQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=n9IeHa1jphL9ex86hNVHAPTc3840PN+lmtU2/VSkMf1/9a3DlKzRkFSnPvJGO3ZQQ bTID8vjjAslTkiauvWcmX/O0kOiZOniWrCUP/YKgySHeNk6+/8j1IrHHHMW6D+yz2v HkyVc11TMXxiLg/eiljYe5u22prkkGWt40THrt2q7ThMkHnfR0nLHobe/eBQh8QEqI sv6LcLeWMfMBCjQW7UCuqInhqaDpgbhsVCJr5GtJc4W+ZjjzTyBpDTslRDoetRhAnD z5cwrXmeEvAOIjUjBdQf6hklMw7pz5ll9uuSNRAaFc3NpPJ0/mcp3eP6ZUcPDjS1Al An4idv6KpixvQ== From: Conor Dooley To: linux-kernel@vger.kernel.org Cc: conor@kernel.org, Conor Dooley , Daire McNamara , pierre-henry.moussay@microchip.com, valentina.fernandezalanis@microchip.com, Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Jassi Brar , Lee Jones , Paul Walmsley , Palmer Dabbelt , Albert Ou , Neil Armstrong , Jerome Brunet , Kevin Hilman , Martin Blumenstingl , Philipp Zabel , linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v1 01/11] dt-bindings: mailbox: mpfs: fix reg properties Date: Wed, 2 Oct 2024 11:47:59 +0100 Message-ID: <20241002-stingily-condone-576e948e6d67@spud> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241002-private-unequal-33cfa6101338@spud> References: <20241002-private-unequal-33cfa6101338@spud> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2523; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=Wlw0Jwuc/8eGDJh454E9EF1WuAuS4lI9nJV8z679wP8=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDGl/Ve5HirypeJvb+expSafkiYYUR76TvBp95qISbb9OP bwVmr+8o5SFQYyDQVZMkSXxdl+L1Po/Ljuce97CzGFlAhnCwMUpABN5l8HIsP1/U4wy75IFdaY+ lgvqtmq/VrdLsD38V3bCqqtHF7x13M/IcGcFq9L7HlOGM2Wb6uzSc7+95fu068SE2y+2mkSnX8p N5AAA X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241002_034816_913740_975BFEDC X-CRM114-Status: GOOD ( 14.73 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Conor Dooley When the binding for this was originally written, and later modified, mistakes were made - and the precise nature of the later modification should have been a giveaway, but alas I was naive at the time. A more correct modelling of the hardware is to use two syscons and have a single reg entry for the mailbox, containing the mailbox region. The two syscons contain the general control/status registers for the mailbox and the interrupt related registers respectively. The reason for two syscons is that the same mailbox is present on the non-SoC version of the FPGA, which has no interrupt controller, and the shared part of the rtl was unchanged between devices. This is now coming to a head, because the control/status registers share a register region with the "tvs" (temperature & voltage sensors) registers and, as it turns out, people do want to monitor temperatures and voltages... Signed-off-by: Conor Dooley Acked-by: Rob Herring (Arm) --- .../bindings/mailbox/microchip,mpfs-mailbox.yaml | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml index 404477910f029..1332aab9a888f 100644 --- a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml @@ -15,6 +15,8 @@ properties: reg: oneOf: + - items: + - description: mailbox data registers - items: - description: mailbox control & data registers - description: mailbox interrupt registers @@ -23,6 +25,7 @@ properties: - description: mailbox control registers - description: mailbox interrupt registers - description: mailbox data registers + deprecated: true interrupts: maxItems: 1 @@ -41,12 +44,12 @@ additionalProperties: false examples: - | soc { - #address-cells = <2>; - #size-cells = <2>; - mbox: mailbox@37020000 { + #address-cells = <1>; + #size-cells = <1>; + + mailbox@37020800 { compatible = "microchip,mpfs-mailbox"; - reg = <0x0 0x37020000 0x0 0x58>, <0x0 0x2000318C 0x0 0x40>, - <0x0 0x37020800 0x0 0x100>; + reg = <0x37020800 0x100>; interrupt-parent = <&L1>; interrupts = <96>; #mbox-cells = <1>;