From patchwork Thu Oct 17 00:25:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ian Rogers X-Patchwork-Id: 13839325 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 54204D2F7DD for ; Thu, 17 Oct 2024 02:16:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:To:From:Subject:References:Mime-Version :Message-Id:In-Reply-To:Date:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=cLeQ7cXrRR2b1ba3ToNe9SItA2DBfRLur0hL06pBKTw=; b=ICiNFaD5F9JD2J uajxx2RKRuTXaPDfN0dPykZCD7tmORa3MiTu1jO6itDKtwHUL81F3diYUeEG3Q1LD5IpdQLCPPHdR dgscWa3fXnHm88+d9+z0L8gENiznogNAvpYoUB5ctt3/ewQSoBOoFsdIvMTPXpVWKfaO+nlAoyPWx zY1n7mSk4zxu9S2K7BvKZChq+i2rrghon04Wqp7fcKELJwMs0Hbcd0Btpqt9jVAzQQ0Es7HnWDJvO flgkM9OgH/MAhYt7mJ2bwJes9VrrVozRGimCbuPTc4/hVRlbJH5PMksWjGa2xRV6GgfaIk6COWEPX zAH/P+QsWsepqUi5it3g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t1G3R-0000000DWuq-3FC8; Thu, 17 Oct 2024 02:15:57 +0000 Received: from mail-yw1-x114a.google.com ([2607:f8b0:4864:20::114a]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t1EL6-0000000DKNj-2Mnq for linux-riscv@lists.infradead.org; Thu, 17 Oct 2024 00:26:06 +0000 Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-6e35199eb2bso8983887b3.3 for ; Wed, 16 Oct 2024 17:26:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1729124762; x=1729729562; darn=lists.infradead.org; h=to:from:subject:references:mime-version:message-id:in-reply-to:date :from:to:cc:subject:date:message-id:reply-to; bh=f+6tiaKaV6HvKOoydGJA88FSVOYPAhxZOHcfM2Yk7U8=; b=Paybn0vJdtPVp1+DED9V21p9a3JO84ykGRuLXyh9NXHgft5/g8jjQcAHztgwB8FkNr IaTgTj9l4+Myp3dbYqa2Xabq9CfVnvjRstPrl62nJKlIoayPI+JNoAAjawMWkN/x4lug WHqHfKCcj4Wpe7gCt/99+Cb7iUt3BAtXsw2yV98PUy1ih35Meigz6ecQEzlQIZhpk33R xaveJdP5LONn9bX3PdBABHykffjyNgxbucILSX3EoIdvBQD+ecsFVm9v5Mdp8iTUbC79 XYDuZtD+mzXbCbbJ+vn6JPt2ySz23YxhLki5BQ9D6IeMpM9OuXVhTINgsfxMBc6JPc9g kCgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729124762; x=1729729562; h=to:from:subject:references:mime-version:message-id:in-reply-to:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=f+6tiaKaV6HvKOoydGJA88FSVOYPAhxZOHcfM2Yk7U8=; b=gAo19TIXsMvNbFo+igxNYbyW/tykMn0AOH9Kj1/cZcqDcNPbzEkxTt1tAPwGtdCsHL V3NJsV8wU0mDE7ZNzA6Em9maw+suO3fk9iR4P5O5Ku288wPfD1gqlqgVpZs2sPhjsKnB D0TcFeyn6pKhhV7VokgQeBOXbTBeKnlYMluOCHe8y1qEj6x/3oSi00w3AdjniSzVkDR6 uxa9jjFfFpHKs6QhatubjHQzhWol9WBbFE0L5ffcaPRcd5f1Cqs5s+f0MvxCmnwHYiVF 5xpV989r4XNS82bg2VWlN+m6UX+vIx/3vmn19wp+ABgLudtIJh8gAiVN8OUrK3UWmFWl Vwvg== X-Forwarded-Encrypted: i=1; AJvYcCWNtWFpEEz+xZoonDpOq+Cnt/UTVDWjKDUH1xOXEXV6EsQv6Da3sH2XW47qNbdV8qpRJVoPQJxnyf2WIQ==@lists.infradead.org X-Gm-Message-State: AOJu0YxP5b+vALvWMzmZuad0KrdQeH0d+zJdf91UJ8KmJRjn3pAXxzBJ B1CUbmuyepuS3gSHqLZ38299R0W3xRzHDryCcpMnI5kXB5ltDl6gGdzXVuO2YztkXRY4pREri98 QmtSfOw== X-Google-Smtp-Source: AGHT+IF8vR2ODszdvUkiRs2C6hBOma5C+iYC6PWCAbaWDyF1xQHgEj5TqToGlUQxetf5HbIY0PdC8v7iaIAq X-Received: from irogers.svl.corp.google.com ([2620:15c:2c5:11:a00a:f237:9bc0:79c]) (user=irogers job=sendgmr) by 2002:a25:870c:0:b0:e25:5cb1:77cd with SMTP id 3f1490d57ef6-e2978585305mr4689276.10.1729124761924; Wed, 16 Oct 2024 17:26:01 -0700 (PDT) Date: Wed, 16 Oct 2024 17:25:14 -0700 In-Reply-To: <20241017002520.59124-1-irogers@google.com> Message-Id: <20241017002520.59124-15-irogers@google.com> Mime-Version: 1.0 References: <20241017002520.59124-1-irogers@google.com> X-Mailer: git-send-email 2.47.0.105.g07ac214952-goog Subject: [PATCH v3 14/20] perf riscv: Remove dwarf-regs.c and add dwarf-regs-table.h From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , Kan Liang , John Garry , Will Deacon , James Clark , Mike Leach , Leo Yan , Guo Ren , Paul Walmsley , Palmer Dabbelt , Albert Ou , Nick Terrell , "Masami Hiramatsu (Google)" , Changbin Du , Guilherme Amadio , Yang Jihong , Aditya Gupta , Athira Rajeev , Masahiro Yamada , Bibo Mao , Huacai Chen , Kajol Jain , Atish Patra , Shenlin Liang , Anup Patel , Oliver Upton , "Steinar H. Gunderson" , "Dr. David Alan Gilbert" , Chen Pei , Dima Kogan , Przemek Kitszel , "David S. Miller" , Alexander Lobakin , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-csky@vger.kernel.org, linux-riscv@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241016_172604_633942_059B1989 X-CRM114-Status: GOOD ( 16.80 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The file just provides the function get_arch_regstr, however, if in the only caller get_dwarf_regstr EM_HOST is used for the EM_NONE case, and the register table is provided in a header file, the function can never be called. So remove as dead code. Tidy up the EM_NONE cases for riscv in dwarf-regs.c. Signed-off-by: Ian Rogers --- .../dwarf-regs-table.h} | 32 ++++--------------- tools/perf/arch/riscv/util/Build | 1 - tools/perf/util/dwarf-regs.c | 7 ++-- tools/perf/util/include/dwarf-regs.h | 2 +- 4 files changed, 12 insertions(+), 30 deletions(-) rename tools/perf/arch/riscv/{util/dwarf-regs.c => include/dwarf-regs-table.h} (56%) diff --git a/tools/perf/arch/riscv/util/dwarf-regs.c b/tools/perf/arch/riscv/include/dwarf-regs-table.h similarity index 56% rename from tools/perf/arch/riscv/util/dwarf-regs.c rename to tools/perf/arch/riscv/include/dwarf-regs-table.h index a9c4402ae57e..a45b63a6d5a8 100644 --- a/tools/perf/arch/riscv/util/dwarf-regs.c +++ b/tools/perf/arch/riscv/include/dwarf-regs-table.h @@ -1,23 +1,10 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (C) 2019 Hangzhou C-SKY Microsystems co.,ltd. - * Mapping of DWARF debug register numbers into register names. - */ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifdef DEFINE_DWARF_REGSTR_TABLE +/* This is included in perf/util/dwarf-regs.c */ -#include -#include /* for EINVAL */ -#include /* for strcmp */ -#include +#define REG_DWARFNUM_NAME(reg, idx) [idx] = "%" #reg -struct regs_dwarfnum { - const char *name; - unsigned int dwarfnum; -}; - -#define REG_DWARFNUM_NAME(r, num) {.name = r, .dwarfnum = num} -#define REG_DWARFNUM_END {.name = NULL, .dwarfnum = 0} - -struct regs_dwarfnum riscv_dwarf_regs_table[] = { +static const char * const riscv_regstr_tbl[] = { REG_DWARFNUM_NAME("%zero", 0), REG_DWARFNUM_NAME("%ra", 1), REG_DWARFNUM_NAME("%sp", 2), @@ -50,13 +37,6 @@ struct regs_dwarfnum riscv_dwarf_regs_table[] = { REG_DWARFNUM_NAME("%t4", 29), REG_DWARFNUM_NAME("%t5", 30), REG_DWARFNUM_NAME("%t6", 31), - REG_DWARFNUM_END, }; -#define RISCV_MAX_REGS ((sizeof(riscv_dwarf_regs_table) / \ - sizeof(riscv_dwarf_regs_table[0])) - 1) - -const char *get_arch_regstr(unsigned int n) -{ - return (n < RISCV_MAX_REGS) ? riscv_dwarf_regs_table[n].name : NULL; -} +#endif diff --git a/tools/perf/arch/riscv/util/Build b/tools/perf/arch/riscv/util/Build index 8f93091b8345..58a672246024 100644 --- a/tools/perf/arch/riscv/util/Build +++ b/tools/perf/arch/riscv/util/Build @@ -2,5 +2,4 @@ perf-util-y += perf_regs.o perf-util-y += header.o perf-util-$(CONFIG_LIBTRACEEVENT) += kvm-stat.o -perf-util-$(CONFIG_LIBDW) += dwarf-regs.o perf-util-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o diff --git a/tools/perf/util/dwarf-regs.c b/tools/perf/util/dwarf-regs.c index 3d98c2bf6035..2c6b197556dd 100644 --- a/tools/perf/util/dwarf-regs.c +++ b/tools/perf/util/dwarf-regs.c @@ -20,6 +20,7 @@ #include "../arch/arm64/include/dwarf-regs-table.h" #include "../arch/sh/include/dwarf-regs-table.h" #include "../arch/powerpc/include/dwarf-regs-table.h" +#include "../arch/riscv/include/dwarf-regs-table.h" #include "../arch/s390/include/dwarf-regs-table.h" #include "../arch/sparc/include/dwarf-regs-table.h" #include "../arch/xtensa/include/dwarf-regs-table.h" @@ -33,7 +34,7 @@ const char *get_dwarf_regstr(unsigned int n, unsigned int machine, unsigned int { #if EM_HOST == EM_X86_64 || EM_HOST == EM_386 || EM_HOST == EM_AARCH64 || EM_HOST == EM_ARM \ || EM_HOST == EM_CSKY || EM_HOST == EM_LOONGARCH || EM_HOST == EM_MIPS || EM_HOST == EM_PPC \ - || EM_HOST == EM_PPC64 + || EM_HOST == EM_PPC64 || EM_HOST == EM_RISCV if (machine == EM_NONE) { /* Generic arch - use host arch */ machine = EM_HOST; @@ -42,7 +43,7 @@ const char *get_dwarf_regstr(unsigned int n, unsigned int machine, unsigned int switch (machine) { #if EM_HOST != EM_X86_64 && EM_HOST != EM_386 && EM_HOST != EM_AARCH64 && EM_HOST != EM_ARM \ && EM_HOST != EM_CSKY && EM_HOST != EM_LOONGARCH && EM_HOST != EM_MIPS && EM_HOST != EM_PPC \ - && EM_HOST != EM_PPC64 + && EM_HOST != EM_PPC64 && EM_HOST != EM_RISCV case EM_NONE: /* Generic arch - use host arch */ return get_arch_regstr(n); #endif @@ -63,6 +64,8 @@ const char *get_dwarf_regstr(unsigned int n, unsigned int machine, unsigned int case EM_PPC: case EM_PPC64: return __get_dwarf_regstr(powerpc_regstr_tbl, n); + case EM_RISCV: + return __get_dwarf_regstr(riscv_regstr_tbl, n); case EM_SPARC: case EM_SPARCV9: return __get_dwarf_regstr(sparc_regstr_tbl, n); diff --git a/tools/perf/util/include/dwarf-regs.h b/tools/perf/util/include/dwarf-regs.h index 1763280855ce..35f4f33205da 100644 --- a/tools/perf/util/include/dwarf-regs.h +++ b/tools/perf/util/include/dwarf-regs.h @@ -81,7 +81,7 @@ #ifdef HAVE_LIBDW_SUPPORT #if !defined(__x86_64__) && !defined(__i386__) && !defined(__aarch64__) && !defined(__arm__) \ && !defined(__loongarch__) && !defined(__mips__) && !defined(__powerpc__) \ - && !defined(__powerpc64__) + && !defined(__powerpc64__) && !defined(__riscv__) const char *get_arch_regstr(unsigned int n); #endif