From patchwork Thu Oct 17 00:25:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ian Rogers X-Patchwork-Id: 13839165 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D74CDD2F7D8 for ; Thu, 17 Oct 2024 00:56:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:To:From:Subject:References:Mime-Version :Message-Id:In-Reply-To:Date:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=phGRQhyHkhFdWkoYLTdYzRfPeYnXS/uQ+rh5ffTcFTs=; b=SKQLD1E3ksB9ES Pmmv95FiV6W9E2H7eZ64fk8fv+25FyUfd5uTR8i2mUUOHFmtUE4O2cxxUEdGJuXWVdKbQVFS6Wjzn ZEB6n6RERH6oOhtzlPuDlafGgPy0FM1yGDzSYT89Vu0IqRD/UAi10MhNVOEqiAZq0T8oyOXZB2kXm 8tSaIxAeygSUCbjKdcsgEVwqugqGBdUqAOrnanrXUylcH9Fh2y7nHQlSUlX+TFjsyaJW5kX3YJZrS zpJs2zfI3jYKaXsrZN2yqV8bz6SLmVj7MJvoyfy1lG3UQBq5CicvISyUx70/u8MhO1WovQf+iiqnj aWULX8LDE1g8vkKmG+SQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t1EoN-0000000DOvG-1QlI; Thu, 17 Oct 2024 00:56:19 +0000 Received: from mail-yb1-f202.google.com ([209.85.219.202]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t1EKf-0000000DK7x-0C9E for linux-riscv@lists.infradead.org; Thu, 17 Oct 2024 00:25:39 +0000 Received: by mail-yb1-f202.google.com with SMTP id 3f1490d57ef6-e290947f6f8so691377276.2 for ; Wed, 16 Oct 2024 17:25:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1729124735; x=1729729535; darn=lists.infradead.org; h=to:from:subject:references:mime-version:message-id:in-reply-to:date :from:to:cc:subject:date:message-id:reply-to; bh=zPuJy23SWmMfM/R7Lv+B/JUCmZ6weqPIHtsQlmnrHas=; b=CklBTy/GfpTvjrc7t4vuITxlXQ1e3vO0MNlQyDe4XXcuYccw7Sdzv/DDq26+OdU9N2 Rc0n1qV+ST3R4BbYHpMJtvdv+lyxV0gmzPhXaGkDn1ammbHr28cHm1y2l1uwAxUsp7aS CAxIxn7rWbYIIJm9MCZgC1udAwhHDviFgL1YnHztUsqpiqUw2sWf+qUYlkFABs2UhHgU pWEBcuzbCna8W4dXtZPDMwI72L0cpqV/xCtHEQJjRphRNU2zBshukVpDzpfyudhm/Y3P rx2M5Xmk8jvRE2p0prOBPB/vrpmsovMHNCf5lI6z2ka6vw9xR6MbJsvZK+Lg/FCUNrsp 3i4w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729124735; x=1729729535; h=to:from:subject:references:mime-version:message-id:in-reply-to:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=zPuJy23SWmMfM/R7Lv+B/JUCmZ6weqPIHtsQlmnrHas=; b=dFw/OoFD/cVr5/k2LSUOsmHlLfymxR7nmgWMQ9ZyqNl99nfvbk4yDR+9X4m6vgz1MC Om31cNmLTRXNrnpUXZwD+HokQ4xaGSpt0/AAniNGXxFHdQZmjiBUAtgysC9TT/pxrFdq 2PpfSDCfYofw9erPr7LNaiCWzu8hGwmMXNYSUy2sBvejgyR1kO+YUNDEKyDVSC2mTTgc k6jRbNWIRIlkjneamdWZstyhKxOYng5yFfX5MILUWd9HkeJOE5bUT3B7gINZsMRgyrMo Gg50BoGMN3ReKPOFZiANMxlbNZdXrBA/cdaG/rbUk1C20uIWeNvJm6arGav5U8/dVP86 xipg== X-Forwarded-Encrypted: i=1; AJvYcCXkLgeYdoAI1pcfjY/rx6G7VHrUHGXTkRTRDmdcl4msYKeiuqzzGDTnbWhUcJDzLeBJeSqUb1A16HNWxg==@lists.infradead.org X-Gm-Message-State: AOJu0YyQjftfiH38KVJmIUdDhEZPFjXq+DyOSFWH3frNk0s7AwH6rjcn janVFOSEfBlZKaU+5vNotWKM3EX1uMRsSWPWFHnUHz08vKEXmV5hLqcwZtTYVuZvM2hwdDlAdwI WMwap7w== X-Google-Smtp-Source: AGHT+IGVbm7ifaHt/Fl/drq6Q4bQa5ufX0E3xNqrZof9j3qtFmTHHwBTTD4/diJBn39+kY+JKl2TpaixKpZq X-Received: from irogers.svl.corp.google.com ([2620:15c:2c5:11:a00a:f237:9bc0:79c]) (user=irogers job=sendgmr) by 2002:a25:aa09:0:b0:e29:74e3:616c with SMTP id 3f1490d57ef6-e29782e9e9cmr2959276.3.1729124735151; Wed, 16 Oct 2024 17:25:35 -0700 (PDT) Date: Wed, 16 Oct 2024 17:25:03 -0700 In-Reply-To: <20241017002520.59124-1-irogers@google.com> Message-Id: <20241017002520.59124-4-irogers@google.com> Mime-Version: 1.0 References: <20241017002520.59124-1-irogers@google.com> X-Mailer: git-send-email 2.47.0.105.g07ac214952-goog Subject: [PATCH v3 03/20] perf dwarf-regs: Add EM_HOST and EF_HOST defines From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , Kan Liang , John Garry , Will Deacon , James Clark , Mike Leach , Leo Yan , Guo Ren , Paul Walmsley , Palmer Dabbelt , Albert Ou , Nick Terrell , "Masami Hiramatsu (Google)" , Changbin Du , Guilherme Amadio , Yang Jihong , Aditya Gupta , Athira Rajeev , Masahiro Yamada , Bibo Mao , Huacai Chen , Kajol Jain , Atish Patra , Shenlin Liang , Anup Patel , Oliver Upton , "Steinar H. Gunderson" , "Dr. David Alan Gilbert" , Chen Pei , Dima Kogan , Przemek Kitszel , "David S. Miller" , Alexander Lobakin , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-csky@vger.kernel.org, linux-riscv@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241016_172537_115316_C7BA27B0 X-CRM114-Status: GOOD ( 13.05 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Computed from the build architecture defines, EM_HOST and EF_HOST give values that can be used in dwarf register lookup. Place in dwarf-regs.h so the value can be shared. Move some dwarf-regs.c constants used for EM_HOST to dwarf-regs.h. Signed-off-by: Ian Rogers --- tools/perf/util/dwarf-regs.c | 8 ---- tools/perf/util/include/dwarf-regs.h | 72 ++++++++++++++++++++++++++++ 2 files changed, 72 insertions(+), 8 deletions(-) diff --git a/tools/perf/util/dwarf-regs.c b/tools/perf/util/dwarf-regs.c index 5b7f86c0063f..7c01bc4d7e5b 100644 --- a/tools/perf/util/dwarf-regs.c +++ b/tools/perf/util/dwarf-regs.c @@ -13,14 +13,6 @@ #include #include -#ifndef EM_AARCH64 -#define EM_AARCH64 183 /* ARM 64 bit */ -#endif - -#ifndef EM_LOONGARCH -#define EM_LOONGARCH 258 /* LoongArch */ -#endif - /* Define const char * {arch}_register_tbl[] */ #define DEFINE_DWARF_REGSTR_TABLE #include "../arch/x86/include/dwarf-regs-table.h" diff --git a/tools/perf/util/include/dwarf-regs.h b/tools/perf/util/include/dwarf-regs.h index fbdd7307e0c2..f4f87ded5e3d 100644 --- a/tools/perf/util/include/dwarf-regs.h +++ b/tools/perf/util/include/dwarf-regs.h @@ -2,6 +2,78 @@ #ifndef _PERF_DWARF_REGS_H_ #define _PERF_DWARF_REGS_H_ #include "annotate.h" +#include + +#ifndef EM_AARCH64 +#define EM_AARCH64 183 /* ARM 64 bit */ +#endif + +#ifndef EM_LOONGARCH +#define EM_LOONGARCH 258 /* LoongArch */ +#endif + +/* EM_HOST gives the ELF machine for host, EF_HOST gives additional flags. */ +#if defined(__x86_64__) + #define EM_HOST EM_X86_64 +#elif defined(__i386__) + #define EM_HOST EM_386 +#elif defined(__aarch64__) + #define EM_HOST EM_AARCH64 +#elif defined(__arm__) + #define EM_HOST EM_ARM +#elif defined(__alpha__) + #define EM_HOST EM_ALPHA +#elif defined(__arc__) + #define EM_HOST EM_ARC +#elif defined(__AVR__) + #define EM_HOST EM_AVR +#elif defined(__AVR32__) + #define EM_HOST EM_AVR32 +#elif defined(__bfin__) + #define EM_HOST EM_BLACKFIN +#elif defined(__csky__) + #define EM_HOST EM_CSKY + #if defined(__CSKYABIV2__) + #define EF_HOST EF_CSKY_ABIV2 + #else + #define EF_HOST EF_CSKY_ABIV1 + #endif +#elif defined(__cris__) + #define EM_HOST EM_CRIS +#elif defined(__hppa__) // HP PA-RISC + #define EM_HOST EM_PARISC +#elif defined(__loongarch__) + #define EM_HOST EM_LOONGARCH +#elif defined(__mips__) + #define EM_HOST EM_MIPS +#elif defined(__m32r__) + #define EM_HOST EM_M32R +#elif defined(__microblaze__) + #define EM_HOST EM_MICROBLAZE +#elif defined(__MSP430__) + #define EM_HOST EM_MSP430 +#elif defined(__powerpc64__) + #define EM_HOST EM_PPC64 +#elif defined(__powerpc__) + #define EM_HOST EM_PPC +#elif defined(__riscv) + #define EM_HOST EM_RISCV +#elif defined(__s390x__) + #define EM_HOST EM_S390 +#elif defined(__sh__) + #define EM_HOST EM_SH +#elif defined(__sparc64__) || defined(__sparc__) + #define EM_HOST EM_SPARC +#elif defined(__xtensa__) + #define EM_HOST EM_XTENSA +#else + /* Unknown host ELF machine type. */ + #define EM_HOST EM_NONE +#endif + +#if !defined(EF_HOST) + #define EF_HOST 0 +#endif #define DWARF_REG_PC 0xd3af9c /* random number */ #define DWARF_REG_FB 0xd3affb /* random number */