diff mbox series

[RFC,v1,2/3] riscv: dts: starfive: jh7110: add DRAM memory controller node

Message ID 20250102204137.423081-3-e@freeshell.de (mailing list archive)
State New
Headers show
Series riscv: dts: starfive: jh7110: More U-Boot downstream changes for JH7110 | expand

Checks

Context Check Description
conchuod/vmtest-for-next-PR fail PR summary
conchuod/patch-2-test-1 success .github/scripts/patches/tests/build_rv32_defconfig.sh took 105.43s
conchuod/patch-2-test-2 success .github/scripts/patches/tests/build_rv64_clang_allmodconfig.sh took 995.67s
conchuod/patch-2-test-3 success .github/scripts/patches/tests/build_rv64_gcc_allmodconfig.sh took 1162.20s
conchuod/patch-2-test-4 success .github/scripts/patches/tests/build_rv64_nommu_k210_defconfig.sh took 16.09s
conchuod/patch-2-test-5 success .github/scripts/patches/tests/build_rv64_nommu_virt_defconfig.sh took 17.79s
conchuod/patch-2-test-6 warning .github/scripts/patches/tests/checkpatch.sh took 0.40s
conchuod/patch-2-test-7 fail .github/scripts/patches/tests/dtb_warn_rv64.sh took 37.40s
conchuod/patch-2-test-8 success .github/scripts/patches/tests/header_inline.sh took 0.00s
conchuod/patch-2-test-9 success .github/scripts/patches/tests/kdoc.sh took 0.50s
conchuod/patch-2-test-10 success .github/scripts/patches/tests/module_param.sh took 0.01s
conchuod/patch-2-test-11 success .github/scripts/patches/tests/verify_fixes.sh took 0.00s
conchuod/patch-2-test-12 success .github/scripts/patches/tests/verify_signedoff.sh took 0.02s

Commit Message

E Shattow Jan. 2, 2025, 8:41 p.m. UTC
add DRAM memory controller node (no driver), required for U-Boot to boot
successfully.

Signed-off-by: E Shattow <e@freeshell.de>
---
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

Comments

Conor Dooley Jan. 13, 2025, 6:41 p.m. UTC | #1
On Thu, Jan 02, 2025 at 12:41:22PM -0800, E Shattow wrote:
> add DRAM memory controller node (no driver), required for U-Boot to boot
> successfully.
> 
> Signed-off-by: E Shattow <e@freeshell.de>
> ---
>  arch/riscv/boot/dts/starfive/jh7110.dtsi | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index 0bc922b3ae8a..6948974400c1 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -381,6 +381,19 @@ ccache: cache-controller@2010000 {
>  			cache-unified;
>  		};
>  
> +		dmc: dmc@15700000 {

memory-controller@157.... cos you don't need the label and "dmc" isn't
generic. You're missing a binding for this either way.

> +			compatible = "starfive,jh7110-dmc";


> +			reg = <0x0 0x15700000 0x0 0x10000>,
> +			      <0x0 0x13000000 0x0 0x10000>;
> +			resets = <&syscrg JH7110_SYSRST_DDR_AXI>,
> +				 <&syscrg JH7110_SYSRST_DDR_OSC>,
> +				 <&syscrg JH7110_SYSRST_DDR_APB>;
> +			reset-names = "axi", "osc", "apb";
> +			clocks = <&syscrg JH7110_PLLCLK_PLL1_OUT>;
> +			clock-names = "pll1_out";
> +			clock-frequency = <2133>;
> +		};
> +
>  		plic: interrupt-controller@c000000 {
>  			compatible = "starfive,jh7110-plic", "sifive,plic-1.0.0";
>  			reg = <0x0 0xc000000 0x0 0x4000000>;
> -- 
> 2.45.2
>
diff mbox series

Patch

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 0bc922b3ae8a..6948974400c1 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -381,6 +381,19 @@  ccache: cache-controller@2010000 {
 			cache-unified;
 		};
 
+		dmc: dmc@15700000 {
+			compatible = "starfive,jh7110-dmc";
+			reg = <0x0 0x15700000 0x0 0x10000>,
+			      <0x0 0x13000000 0x0 0x10000>;
+			resets = <&syscrg JH7110_SYSRST_DDR_AXI>,
+				 <&syscrg JH7110_SYSRST_DDR_OSC>,
+				 <&syscrg JH7110_SYSRST_DDR_APB>;
+			reset-names = "axi", "osc", "apb";
+			clocks = <&syscrg JH7110_PLLCLK_PLL1_OUT>;
+			clock-names = "pll1_out";
+			clock-frequency = <2133>;
+		};
+
 		plic: interrupt-controller@c000000 {
 			compatible = "starfive,jh7110-plic", "sifive,plic-1.0.0";
 			reg = <0x0 0xc000000 0x0 0x4000000>;