diff mbox series

iommu/riscv: Fixup compile warning

Message ID 20250103024616.3359159-1-guoren@kernel.org (mailing list archive)
State Accepted
Commit 10c62c38b073ecea775b7e23fa7c7a3995a84ff3
Headers show
Series iommu/riscv: Fixup compile warning | expand

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conchuod/vmtest-for-next-PR success PR summary
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Commit Message

Guo Ren Jan. 3, 2025, 2:46 a.m. UTC
From: Guo Ren <guoren@linux.alibaba.com>

When __BITS_PER_LONG == 32, size_t is defined as unsigned int rather
than unsigned long. Therefore, we should use size_t to avoid
type-checking errors.

Fixes: 488ffbf18171 ("iommu/riscv: Paging domain support")
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
Cc: Tomasz Jeznach <tjeznach@rivosinc.com>
---
 drivers/iommu/riscv/iommu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Alexandre Ghiti Jan. 6, 2025, 10:31 a.m. UTC | #1
Hi Guo,

On 03/01/2025 03:46, guoren@kernel.org wrote:
> From: Guo Ren <guoren@linux.alibaba.com>
>
> When __BITS_PER_LONG == 32, size_t is defined as unsigned int rather


RISCV_IOMMU depends on 64BIT so how do you get __BITS_PER_LONG == 32?

Thanks,

Alex


> than unsigned long. Therefore, we should use size_t to avoid
> type-checking errors.
>
> Fixes: 488ffbf18171 ("iommu/riscv: Paging domain support")
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Signed-off-by: Guo Ren <guoren@kernel.org>
> Cc: Tomasz Jeznach <tjeznach@rivosinc.com>
> ---
>   drivers/iommu/riscv/iommu.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c
> index 8a05def774bd..38d381164385 100644
> --- a/drivers/iommu/riscv/iommu.c
> +++ b/drivers/iommu/riscv/iommu.c
> @@ -1270,7 +1270,7 @@ static phys_addr_t riscv_iommu_iova_to_phys(struct iommu_domain *iommu_domain,
>   					    dma_addr_t iova)
>   {
>   	struct riscv_iommu_domain *domain = iommu_domain_to_riscv(iommu_domain);
> -	unsigned long pte_size;
> +	size_t pte_size;
>   	unsigned long *ptr;
>   
>   	ptr = riscv_iommu_pte_fetch(domain, iova, &pte_size);
Samuel Holland Jan. 6, 2025, 5:47 p.m. UTC | #2
Hi Alex,

On 2025-01-06 4:31 AM, Alexandre Ghiti wrote:
> On 03/01/2025 03:46, guoren@kernel.org wrote:
>> From: Guo Ren <guoren@linux.alibaba.com>
>>
>> When __BITS_PER_LONG == 32, size_t is defined as unsigned int rather
> 
> 
> RISCV_IOMMU depends on 64BIT so how do you get __BITS_PER_LONG == 32?

I am guessing this is from some downstream effort to compile a 64-bit kernel
with an ILP32 ABI. However unsupported that may be, size_t is the nominal type
used in both riscv_iommu_pte_fetch() and above in iommu_iotlb_gather_add_page(),
so the change does make sense.

Regards,
Samuel

>> than unsigned long. Therefore, we should use size_t to avoid
>> type-checking errors.
>>
>> Fixes: 488ffbf18171 ("iommu/riscv: Paging domain support")
>> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
>> Signed-off-by: Guo Ren <guoren@kernel.org>
>> Cc: Tomasz Jeznach <tjeznach@rivosinc.com>
>> ---
>>   drivers/iommu/riscv/iommu.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c
>> index 8a05def774bd..38d381164385 100644
>> --- a/drivers/iommu/riscv/iommu.c
>> +++ b/drivers/iommu/riscv/iommu.c
>> @@ -1270,7 +1270,7 @@ static phys_addr_t riscv_iommu_iova_to_phys(struct
>> iommu_domain *iommu_domain,
>>                           dma_addr_t iova)
>>   {
>>       struct riscv_iommu_domain *domain = iommu_domain_to_riscv(iommu_domain);
>> -    unsigned long pte_size;
>> +    size_t pte_size;
>>       unsigned long *ptr;
>>         ptr = riscv_iommu_pte_fetch(domain, iova, &pte_size);
Guo Ren Jan. 8, 2025, 6:47 a.m. UTC | #3
Hi Samuel & Alexandre,

On Tue, Jan 7, 2025 at 1:47 AM Samuel Holland <samuel.holland@sifive.com> wrote:
>
> Hi Alex,
>
> On 2025-01-06 4:31 AM, Alexandre Ghiti wrote:
> > On 03/01/2025 03:46, guoren@kernel.org wrote:
> >> From: Guo Ren <guoren@linux.alibaba.com>
> >>
> >> When __BITS_PER_LONG == 32, size_t is defined as unsigned int rather
> >
> >
> > RISCV_IOMMU depends on 64BIT so how do you get __BITS_PER_LONG == 32?
>
> I am guessing this is from some downstream effort to compile a 64-bit kernel
> with an ILP32 ABI. However unsupported that may be, size_t is the nominal type
> used in both riscv_iommu_pte_fetch() and above in iommu_iotlb_gather_add_page(),
> so the change does make sense.
Yes, I'm working on ILP32 ABI on CONFIG_64BIT=y. So, I got the warning
when __BITS_PER_LONG == 32.

In riscv_iommu_unmap_pages(), we've written "size_t pte_size;." So, we
should do that in "riscv_iommu_iova_to_phys()".

>
> Regards,
> Samuel
>
> >> than unsigned long. Therefore, we should use size_t to avoid
> >> type-checking errors.
> >>
> >> Fixes: 488ffbf18171 ("iommu/riscv: Paging domain support")
> >> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> >> Signed-off-by: Guo Ren <guoren@kernel.org>
> >> Cc: Tomasz Jeznach <tjeznach@rivosinc.com>
> >> ---
> >>   drivers/iommu/riscv/iommu.c | 2 +-
> >>   1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c
> >> index 8a05def774bd..38d381164385 100644
> >> --- a/drivers/iommu/riscv/iommu.c
> >> +++ b/drivers/iommu/riscv/iommu.c
> >> @@ -1270,7 +1270,7 @@ static phys_addr_t riscv_iommu_iova_to_phys(struct
> >> iommu_domain *iommu_domain,
> >>                           dma_addr_t iova)
> >>   {
> >>       struct riscv_iommu_domain *domain = iommu_domain_to_riscv(iommu_domain);
> >> -    unsigned long pte_size;
> >> +    size_t pte_size;
> >>       unsigned long *ptr;
> >>         ptr = riscv_iommu_pte_fetch(domain, iova, &pte_size);
>
Charlie Jenkins Jan. 10, 2025, 2:44 a.m. UTC | #4
On Thu, Jan 02, 2025 at 09:46:16PM -0500, guoren@kernel.org wrote:
> From: Guo Ren <guoren@linux.alibaba.com>
> 
> When __BITS_PER_LONG == 32, size_t is defined as unsigned int rather
> than unsigned long. Therefore, we should use size_t to avoid
> type-checking errors.
> 
> Fixes: 488ffbf18171 ("iommu/riscv: Paging domain support")
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Signed-off-by: Guo Ren <guoren@kernel.org>
> Cc: Tomasz Jeznach <tjeznach@rivosinc.com>
> ---
>  drivers/iommu/riscv/iommu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c
> index 8a05def774bd..38d381164385 100644
> --- a/drivers/iommu/riscv/iommu.c
> +++ b/drivers/iommu/riscv/iommu.c
> @@ -1270,7 +1270,7 @@ static phys_addr_t riscv_iommu_iova_to_phys(struct iommu_domain *iommu_domain,
>  					    dma_addr_t iova)
>  {
>  	struct riscv_iommu_domain *domain = iommu_domain_to_riscv(iommu_domain);
> -	unsigned long pte_size;
> +	size_t pte_size;

riscv_iommu_pte_fetch() expects size_t so even though ILP32 isn't
currently supported in the kernel, this change makes sense.

Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>

>  	unsigned long *ptr;
>  
>  	ptr = riscv_iommu_pte_fetch(domain, iova, &pte_size);
> -- 
> 2.40.1
> 
> 
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
Tomasz Jeznach Jan. 10, 2025, 8:48 p.m. UTC | #5
On Tue, Jan 7, 2025 at 10:48 PM Guo Ren <guoren@kernel.org> wrote:
>
> Hi Samuel & Alexandre,
>
> On Tue, Jan 7, 2025 at 1:47 AM Samuel Holland <samuel.holland@sifive.com> wrote:
> >
> > Hi Alex,
> >
> > On 2025-01-06 4:31 AM, Alexandre Ghiti wrote:
> > > On 03/01/2025 03:46, guoren@kernel.org wrote:
> > >> From: Guo Ren <guoren@linux.alibaba.com>
> > >>
> > >> When __BITS_PER_LONG == 32, size_t is defined as unsigned int rather
> > >
> > >
> > > RISCV_IOMMU depends on 64BIT so how do you get __BITS_PER_LONG == 32?
> >
> > I am guessing this is from some downstream effort to compile a 64-bit kernel
> > with an ILP32 ABI. However unsupported that may be, size_t is the nominal type
> > used in both riscv_iommu_pte_fetch() and above in iommu_iotlb_gather_add_page(),
> > so the change does make sense.
> Yes, I'm working on ILP32 ABI on CONFIG_64BIT=y. So, I got the warning
> when __BITS_PER_LONG == 32.
>
> In riscv_iommu_unmap_pages(), we've written "size_t pte_size;." So, we
> should do that in "riscv_iommu_iova_to_phys()".
>

Thanks for pointing this out.
Do we have to change other relevant uses of `unsigned long` to either
`phys_addr_t` or `dma_addr_t` to avoid type mismatch and get ILP32
working correctly?

Anyway, for quick warning fix:
Reviewed-by: Tomasz Jeznach <tjeznach@rivosinc.com>

> >
> > Regards,
> > Samuel
> >
> > >> than unsigned long. Therefore, we should use size_t to avoid
> > >> type-checking errors.
> > >>
> > >> Fixes: 488ffbf18171 ("iommu/riscv: Paging domain support")
> > >> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> > >> Signed-off-by: Guo Ren <guoren@kernel.org>
> > >> Cc: Tomasz Jeznach <tjeznach@rivosinc.com>
> > >> ---
> > >>   drivers/iommu/riscv/iommu.c | 2 +-
> > >>   1 file changed, 1 insertion(+), 1 deletion(-)
> > >>
> > >> diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c
> > >> index 8a05def774bd..38d381164385 100644
> > >> --- a/drivers/iommu/riscv/iommu.c
> > >> +++ b/drivers/iommu/riscv/iommu.c
> > >> @@ -1270,7 +1270,7 @@ static phys_addr_t riscv_iommu_iova_to_phys(struct
> > >> iommu_domain *iommu_domain,
> > >>                           dma_addr_t iova)
> > >>   {
> > >>       struct riscv_iommu_domain *domain = iommu_domain_to_riscv(iommu_domain);
> > >> -    unsigned long pte_size;
> > >> +    size_t pte_size;
> > >>       unsigned long *ptr;
> > >>         ptr = riscv_iommu_pte_fetch(domain, iova, &pte_size);
> >
>
>
> --
> Best Regards
>  Guo Ren
Joerg Roedel Jan. 17, 2025, 7:58 a.m. UTC | #6
On Thu, Jan 02, 2025 at 09:46:16PM -0500, guoren@kernel.org wrote:
> From: Guo Ren <guoren@linux.alibaba.com>
> 
> When __BITS_PER_LONG == 32, size_t is defined as unsigned int rather
> than unsigned long. Therefore, we should use size_t to avoid
> type-checking errors.
> 
> Fixes: 488ffbf18171 ("iommu/riscv: Paging domain support")
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Signed-off-by: Guo Ren <guoren@kernel.org>
> Cc: Tomasz Jeznach <tjeznach@rivosinc.com>
> ---
>  drivers/iommu/riscv/iommu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Applied, thanks.
patchwork-bot+linux-riscv@kernel.org Feb. 3, 2025, 7:16 p.m. UTC | #7
Hello:

This patch was applied to riscv/linux.git (fixes)
by Joerg Roedel <jroedel@suse.de>:

On Thu,  2 Jan 2025 21:46:16 -0500 you wrote:
> From: Guo Ren <guoren@linux.alibaba.com>
> 
> When __BITS_PER_LONG == 32, size_t is defined as unsigned int rather
> than unsigned long. Therefore, we should use size_t to avoid
> type-checking errors.
> 
> Fixes: 488ffbf18171 ("iommu/riscv: Paging domain support")
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Signed-off-by: Guo Ren <guoren@kernel.org>
> Cc: Tomasz Jeznach <tjeznach@rivosinc.com>
> 
> [...]

Here is the summary with links:
  - iommu/riscv: Fixup compile warning
    https://git.kernel.org/riscv/c/10c62c38b073

You are awesome, thank you!
diff mbox series

Patch

diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c
index 8a05def774bd..38d381164385 100644
--- a/drivers/iommu/riscv/iommu.c
+++ b/drivers/iommu/riscv/iommu.c
@@ -1270,7 +1270,7 @@  static phys_addr_t riscv_iommu_iova_to_phys(struct iommu_domain *iommu_domain,
 					    dma_addr_t iova)
 {
 	struct riscv_iommu_domain *domain = iommu_domain_to_riscv(iommu_domain);
-	unsigned long pte_size;
+	size_t pte_size;
 	unsigned long *ptr;
 
 	ptr = riscv_iommu_pte_fetch(domain, iova, &pte_size);