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Wed, 15 Jan 2025 06:14:14 -0500 (EST) From: Celeste Liu Date: Wed, 15 Jan 2025 19:13:27 +0800 Subject: [PATCH v6 1/3] riscv/ptrace: add new regset to access original a0 register MIME-Version: 1.0 Message-Id: <20250115-riscv-new-regset-v6-1-59bfddd33525@coelacanthus.name> References: <20250115-riscv-new-regset-v6-0-59bfddd33525@coelacanthus.name> In-Reply-To: <20250115-riscv-new-regset-v6-0-59bfddd33525@coelacanthus.name> To: Oleg Nesterov , Paul Walmsley , Palmer Dabbelt , Eric Biederman , Kees Cook , Shuah Khan , Albert Ou Cc: Alexandre Ghiti , "Dmitry V. Levin" , Andrea Bolognani , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Ron Economos , Charlie Jenkins , Andrew Jones , Quan Zhou , Felix Yan , Ruizhe Pan , Guo Ren , Yao Zi , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, Celeste Liu , stable@vger.kernel.org, =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= X-Mailer: b4 0.15-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=3197; i=uwu@coelacanthus.name; h=from:subject:message-id; bh=Bd0I0lIMKMC4KxEOjUIKWSGVerkNEic9IL2ALFZ+R48=; b=owJ4nJvAy8zAJeafov85RWVtBeNptSSG9PYZ5VutbCad5Tn5ndOR38uJYV7Dv+6vnvq+FfPTO Y/NcE6L4e4oZWEQ42KQFVNkySth+cl56Wz33o7tXTBzWJlAhjBwcQrAROaGMTI8d991KlKo4aFX I19XSsrdpJofD4xDWCJfvDU3FFGb/7qL4X8Ux5rc0wu8ddemZqSnL2Bb/XjS3wA172m/l4Umzts xwZIDAL8wRz0= X-Developer-Key: i=uwu@coelacanthus.name; a=openpgp; fpr=892EBC7DC392DFF9C9C03F1D15F4180E73787863 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250115_031417_743003_8F6DF995 X-CRM114-Status: GOOD ( 12.38 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The orig_a0 is missing in struct user_regs_struct of riscv, and there is no way to add it without breaking UAPI. (See Link tag below) Like NT_ARM_SYSTEM_CALL do, we add a new regset name NT_RISCV_ORIG_A0 to access original a0 register from userspace via ptrace API. Fixes: e2c0cdfba7f6 ("RISC-V: User-facing API") Link: https://lore.kernel.org/all/59505464-c84a-403d-972f-d4b2055eeaac@gmail.com/ Cc: stable@vger.kernel.org Reviewed-by: Björn Töpel Signed-off-by: Celeste Liu Reviewed-by: Charlie Jenkins Tested-by: Charlie Jenkins --- arch/riscv/kernel/ptrace.c | 32 ++++++++++++++++++++++++++++++++ include/uapi/linux/elf.h | 1 + 2 files changed, 33 insertions(+) diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c index ea67e9fb7a583683b922fe2c017ea61f3bc848db..ef9ab74c8575a5c440155973b1c625c06a867c97 100644 --- a/arch/riscv/kernel/ptrace.c +++ b/arch/riscv/kernel/ptrace.c @@ -31,6 +31,7 @@ enum riscv_regset { #ifdef CONFIG_RISCV_ISA_SUPM REGSET_TAGGED_ADDR_CTRL, #endif + REGSET_ORIG_A0, }; static int riscv_gpr_get(struct task_struct *target, @@ -184,6 +185,29 @@ static int tagged_addr_ctrl_set(struct task_struct *target, } #endif +static int riscv_orig_a0_get(struct task_struct *target, + const struct user_regset *regset, + struct membuf to) +{ + return membuf_store(&to, task_pt_regs(target)->orig_a0); +} + +static int riscv_orig_a0_set(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + const void *kbuf, const void __user *ubuf) +{ + unsigned long orig_a0 = task_pt_regs(target)->orig_a0; + int ret; + + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &orig_a0, 0, -1); + if (ret) + return ret; + + task_pt_regs(target)->orig_a0 = orig_a0; + return 0; +} + static const struct user_regset riscv_user_regset[] = { [REGSET_X] = { .core_note_type = NT_PRSTATUS, @@ -224,6 +248,14 @@ static const struct user_regset riscv_user_regset[] = { .set = tagged_addr_ctrl_set, }, #endif + [REGSET_ORIG_A0] = { + .core_note_type = NT_RISCV_ORIG_A0, + .n = 1, + .size = sizeof(elf_greg_t), + .align = sizeof(elf_greg_t), + .regset_get = riscv_orig_a0_get, + .set = riscv_orig_a0_set, + }, }; static const struct user_regset_view riscv_user_native_view = { diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h index b44069d29cecc0f9de90ee66bfffd2137f4275a8..390060229601631da2fb27030d9fa2142e676c14 100644 --- a/include/uapi/linux/elf.h +++ b/include/uapi/linux/elf.h @@ -452,6 +452,7 @@ typedef struct elf64_shdr { #define NT_RISCV_CSR 0x900 /* RISC-V Control and Status Registers */ #define NT_RISCV_VECTOR 0x901 /* RISC-V vector registers */ #define NT_RISCV_TAGGED_ADDR_CTRL 0x902 /* RISC-V tagged address control (prctl()) */ +#define NT_RISCV_ORIG_A0 0x903 /* RISC-V original a0 register */ #define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */ #define NT_LOONGARCH_CSR 0xa01 /* LoongArch control and status registers */ #define NT_LOONGARCH_LSX 0xa02 /* LoongArch Loongson SIMD Extension registers */