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[185.174.17.62]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5dc724055e5sm11559997a12.45.2025.02.05.04.52.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Feb 2025 04:52:29 -0800 (PST) From: Andras Szemzo To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Linus Walleij , Philipp Zabel , Maxime Ripard Cc: Vinod Koul , Kishon Vijay Abraham I , Ulf Hansson , Paul Walmsley , Palmer Dabbelt , Albert Ou , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Florian Fainelli , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v2 01/10] clk: sunxi-ng: allow key feature in ccu reset and gate Date: Wed, 5 Feb 2025 13:52:16 +0100 Message-Id: <20250205125225.1152849-2-szemzo.andras@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250205125225.1152849-1-szemzo.andras@gmail.com> References: <20250205125225.1152849-1-szemzo.andras@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_045232_409715_7CE0DA53 X-CRM114-Status: GOOD ( 16.00 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Some newer SoCs, like V853 has reset and gate registers, what can be write only with fixed key value. Move this value from ccu_mux and reuse in the reset code, and also introduce a new macro to support writing gate registers with a key. Signed-off-by: Andras Szemzo --- drivers/clk/sunxi-ng/ccu_common.h | 2 ++ drivers/clk/sunxi-ng/ccu_gate.c | 6 ++++++ drivers/clk/sunxi-ng/ccu_gate.h | 14 ++++++++++++++ drivers/clk/sunxi-ng/ccu_mux.c | 4 +--- drivers/clk/sunxi-ng/ccu_reset.c | 7 +++++++ drivers/clk/sunxi-ng/ccu_reset.h | 2 +- 6 files changed, 31 insertions(+), 4 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu_common.h b/drivers/clk/sunxi-ng/ccu_common.h index dd330426a6e5..36132cb8b920 100644 --- a/drivers/clk/sunxi-ng/ccu_common.h +++ b/drivers/clk/sunxi-ng/ccu_common.h @@ -23,6 +23,8 @@ /* MMC timing mode switch bit */ #define CCU_MMC_NEW_TIMING_MODE BIT(30) +#define CCU_KEY_VALUE 0x16aa0000 + struct device_node; struct ccu_common { diff --git a/drivers/clk/sunxi-ng/ccu_gate.c b/drivers/clk/sunxi-ng/ccu_gate.c index ac52fd6bff67..a7ffaa8d3cb6 100644 --- a/drivers/clk/sunxi-ng/ccu_gate.c +++ b/drivers/clk/sunxi-ng/ccu_gate.c @@ -20,6 +20,9 @@ void ccu_gate_helper_disable(struct ccu_common *common, u32 gate) spin_lock_irqsave(common->lock, flags); reg = readl(common->base + common->reg); + if (common->features & CCU_FEATURE_KEY_FIELD) + reg |= CCU_KEY_VALUE; + writel(reg & ~gate, common->base + common->reg); spin_unlock_irqrestore(common->lock, flags); @@ -44,6 +47,9 @@ int ccu_gate_helper_enable(struct ccu_common *common, u32 gate) spin_lock_irqsave(common->lock, flags); reg = readl(common->base + common->reg); + if (common->features & CCU_FEATURE_KEY_FIELD) + reg |= CCU_KEY_VALUE; + writel(reg | gate, common->base + common->reg); spin_unlock_irqrestore(common->lock, flags); diff --git a/drivers/clk/sunxi-ng/ccu_gate.h b/drivers/clk/sunxi-ng/ccu_gate.h index dc05ce06737a..37e21fcdd931 100644 --- a/drivers/clk/sunxi-ng/ccu_gate.h +++ b/drivers/clk/sunxi-ng/ccu_gate.h @@ -68,6 +68,20 @@ struct ccu_gate { } \ } +#define SUNXI_CCU_GATE_HWS_WITH_KEY(_struct, _name, _parent, _reg, \ + _gate, _flags) \ + struct ccu_gate _struct = { \ + .enable = _gate, \ + .common = { \ + .reg = _reg, \ + .features = CCU_FEATURE_KEY_FIELD, \ + .hw.init = CLK_HW_INIT_HWS(_name, \ + _parent, \ + &ccu_gate_ops, \ + _flags), \ + } \ + } + #define SUNXI_CCU_GATE_HWS_WITH_PREDIV(_struct, _name, _parent, _reg, \ _gate, _prediv, _flags) \ struct ccu_gate _struct = { \ diff --git a/drivers/clk/sunxi-ng/ccu_mux.c b/drivers/clk/sunxi-ng/ccu_mux.c index d7ffbdeee9e0..127269ab20ea 100644 --- a/drivers/clk/sunxi-ng/ccu_mux.c +++ b/drivers/clk/sunxi-ng/ccu_mux.c @@ -12,8 +12,6 @@ #include "ccu_gate.h" #include "ccu_mux.h" -#define CCU_MUX_KEY_VALUE 0x16aa0000 - static u16 ccu_mux_get_prediv(struct ccu_common *common, struct ccu_mux_internal *cm, int parent_index) @@ -196,7 +194,7 @@ int ccu_mux_helper_set_parent(struct ccu_common *common, /* The key field always reads as zero. */ if (common->features & CCU_FEATURE_KEY_FIELD) - reg |= CCU_MUX_KEY_VALUE; + reg |= CCU_KEY_VALUE; reg &= ~GENMASK(cm->width + cm->shift - 1, cm->shift); writel(reg | (index << cm->shift), common->base + common->reg); diff --git a/drivers/clk/sunxi-ng/ccu_reset.c b/drivers/clk/sunxi-ng/ccu_reset.c index 55bc7c7cda0f..a9aee35c6617 100644 --- a/drivers/clk/sunxi-ng/ccu_reset.c +++ b/drivers/clk/sunxi-ng/ccu_reset.c @@ -9,6 +9,7 @@ #include #include "ccu_reset.h" +#include "ccu_common.h" static int ccu_reset_assert(struct reset_controller_dev *rcdev, unsigned long id) @@ -21,6 +22,9 @@ static int ccu_reset_assert(struct reset_controller_dev *rcdev, spin_lock_irqsave(ccu->lock, flags); reg = readl(ccu->base + map->reg); + if (map->features & CCU_FEATURE_KEY_FIELD) + reg |= CCU_KEY_VALUE; + writel(reg & ~map->bit, ccu->base + map->reg); spin_unlock_irqrestore(ccu->lock, flags); @@ -39,6 +43,9 @@ static int ccu_reset_deassert(struct reset_controller_dev *rcdev, spin_lock_irqsave(ccu->lock, flags); reg = readl(ccu->base + map->reg); + if (map->features & CCU_FEATURE_KEY_FIELD) + reg |= CCU_KEY_VALUE; + writel(reg | map->bit, ccu->base + map->reg); spin_unlock_irqrestore(ccu->lock, flags); diff --git a/drivers/clk/sunxi-ng/ccu_reset.h b/drivers/clk/sunxi-ng/ccu_reset.h index 941276a8ec2e..8da721ac3a7d 100644 --- a/drivers/clk/sunxi-ng/ccu_reset.h +++ b/drivers/clk/sunxi-ng/ccu_reset.h @@ -12,9 +12,9 @@ struct ccu_reset_map { u16 reg; u32 bit; + u32 features; }; - struct ccu_reset { void __iomem *base; const struct ccu_reset_map *reset_map;