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([80.71.142.166]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3997f9a6326sm13532091f8f.29.2025.03.25.07.13.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Mar 2025 07:13:18 -0700 (PDT) From: Emil Renner Berthing To: Pinkesh Vaghela , Pritesh Patel , Min Lin Cc: Samuel Holland , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Bartosz Golaszewski , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [RFC PATCH 4/4] riscv: dts: eswin: Add HiFive Premier UART pin control Date: Tue, 25 Mar 2025 15:13:06 +0100 Message-ID: <20250325141311.758787-5-emil.renner.berthing@canonical.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250325141311.758787-1-emil.renner.berthing@canonical.com> References: <20250325141311.758787-1-emil.renner.berthing@canonical.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250325_071322_525364_BBF6E77B X-CRM114-Status: GOOD ( 10.12 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add pin control for UART0 and UART2 in the HiFive Premier P550 device tree. Signed-off-by: Emil Renner Berthing --- .../dts/eswin/eic7700-hifive-premier-p550.dts | 46 +++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts b/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts index 131ed1fc6b2e..c278695dcb2d 100644 --- a/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts +++ b/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts @@ -20,10 +20,56 @@ chosen { }; }; +&pinctrl { + uart0_pins: uart0-0 { + tx-pins { + pins = "UART0_TX"; + function = "uart"; + bias-disable; + drive-strength-microamp = <6700>; + input-disable; + input-schmitt-disable; + }; + + rx-pins { + pins = "UART0_RX"; + function = "uart"; + bias-disable; + drive-strength-microamp = <6700>; + input-enable; + input-schmitt-disable; + }; + }; + + uart2_pins: uart2-0 { + tx-pins { + pins = "UART2_TX"; + function = "uart"; + bias-disable; + drive-strength-microamp = <6700>; + input-disable; + input-schmitt-disable; + }; + + rx-pins { + pins = "UART2_RX"; + function = "uart"; + bias-disable; + drive-strength-microamp = <6700>; + input-enable; + input-schmitt-disable; + }; + }; +}; + &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; status = "okay"; }; &uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; status = "okay"; };