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Mon, 22 Jul 2024 01:40:22 +0000 Received: from IA1PR20MB4953.namprd20.prod.outlook.com ([fe80::ab0b:c0d3:1f91:d149]) by IA1PR20MB4953.namprd20.prod.outlook.com ([fe80::ab0b:c0d3:1f91:d149%5]) with mapi id 15.20.7784.016; Mon, 22 Jul 2024 01:40:22 +0000 From: Inochi Amaoto To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Inochi Amaoto , Paul Walmsley , Palmer Dabbelt , Albert Ou , Jisheng Zhang , Guo Ren , Haylen Chu , Drew Fustini Cc: Yixun Lan , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v2 6/7] riscv: dts: sophgo: cv1800b: add pinctrl support Date: Mon, 22 Jul 2024 09:39:25 +0800 Message-ID: X-Mailer: git-send-email 2.45.2 In-Reply-To: References: X-TMN: [VEhrLQ3W+WaV88UXVBLS1h1vTAnsImLCZLk4UEqTL4M=] X-ClientProxiedBy: TYBP286CA0027.JPNP286.PROD.OUTLOOK.COM (2603:1096:404:10a::15) To IA1PR20MB4953.namprd20.prod.outlook.com (2603:10b6:208:3af::19) X-Microsoft-Original-Message-ID: <20240722013937.623685-6-inochiama@outlook.com> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA1PR20MB4953:EE_|CY8PR20MB5403:EE_ X-MS-Office365-Filtering-Correlation-Id: bb8714c9-5bec-4b22-8c11-08dca9ef402e X-Microsoft-Antispam: BCL:0;ARA:14566002|8060799006|461199028|19110799003|440099028|3412199025|1710799026; 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X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add pinctrl node and related pin configuration for CV1800B SoC. Signed-off-by: Inochi Amaoto --- .../boot/dts/sophgo/cv1800b-milkv-duo.dts | 49 +++++++++++++++++++ arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 10 ++++ 2 files changed, 59 insertions(+) -- 2.45.2 diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts index 375ff2661b6e..9feb520eaec4 100644 --- a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts +++ b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts @@ -39,7 +39,54 @@ &osc { clock-frequency = <25000000>; }; +&pinctrl { + uart0_cfg: uart0-cfg { + uart0-pins { + pinmux = , + ; + bias-pull-up; + drive-strength-microamp = <10800>; + power-source = <3300>; + }; + }; + + sdhci0_cfg: sdhci0-cfg { + sdhci0-clk-pins { + pinmux = ; + bias-pull-up; + drive-strength-microamp = <16100>; + power-source = <3300>; + }; + + sdhci0-cmd-pins { + pinmux = ; + bias-pull-up; + drive-strength-microamp = <10800>; + power-source = <3300>; + }; + + sdhci0-data-pins { + pinmux = , + , + , + ; + bias-pull-up; + drive-strength-microamp = <10800>; + power-source = <3300>; + }; + + sdhci0-cd-pins { + pinmux = ; + bias-pull-up; + drive-strength-microamp = <10800>; + power-source = <3300>; + }; + }; +}; + &sdhci0 { + pinctrl-0 = <&sdhci0_cfg>; + pinctrl-names = "default"; status = "okay"; bus-width = <4>; no-1-8-v; @@ -49,5 +96,7 @@ &sdhci0 { }; &uart0 { + pinctrl-0 = <&uart0_cfg>; + pinctrl-names = "default"; status = "okay"; }; diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi index ec9530972ae2..6a958b822097 100644 --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi @@ -3,6 +3,7 @@ * Copyright (C) 2023 Jisheng Zhang */ +#include #include "cv18xx.dtsi" / { @@ -12,6 +13,15 @@ memory@80000000 { device_type = "memory"; reg = <0x80000000 0x4000000>; }; + + soc { + pinctrl: pinctrl@3008000 { + compatible = "sophgo,cv1800b-pinctrl"; + reg = <0x03001000 0x1000>, + <0x05027000 0x1000>; + reg-names = "sys", "rtc"; + }; + }; }; &plic {