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AJvYcCUNxzAmTD2Re6xTM2jdokoHM7CGPI4LBp2f8qqFPyi7QLQEtUYCuJEUBBY4UPXK7XEn9AOSAnHQvDfdMQ==@lists.infradead.org X-Gm-Message-State: AOJu0Yx5wLq5VyOMlatTc5Zkto1YTq4bMc/nfZqJup3ctxAo6u3ZhRqi QCBBypqJRZ11z9vrE0y0xyVdmFlqzIohGeASqZz2Dr0PuMPt5oN+ X-Google-Smtp-Source: AGHT+IGFLWDdr/KERlkpx8BuwbDh6erVc7wsCpO7c1sCwII502DRfQ2scgY32Y/Ts3V/PR3030bhNw== X-Received: by 2002:a05:6830:3c08:b0:710:f76b:350b with SMTP id 46e09a7af769-710f76b35b2mr307494a34.5.1725934097103; Mon, 09 Sep 2024 19:08:17 -0700 (PDT) Received: from localhost.localdomain ([122.8.183.87]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-710f40989a7sm380982a34.59.2024.09.09.19.08.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Sep 2024 19:08:16 -0700 (PDT) From: Chen Wang To: ukleinek@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, unicorn_wang@outlook.com, inochiama@outlook.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org, linux-riscv@lists.infradead.org, chao.wei@sophgo.com, haijiao.liu@sophgo.com, xiaoguang.xing@sophgo.com, chunzhi.lin@sophgo.com Subject: [PATCH v2 1/2] dt-bindings: pwm: sophgo: add PWM controller for SG2042 Date: Tue, 10 Sep 2024 10:08:10 +0800 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240909_190818_519492_969448B7 X-CRM114-Status: GOOD ( 12.04 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Chen Wang Sophgo SG2042 contains a PWM controller, which has 4 channels and can generate PWM waveforms output. Signed-off-by: Chen Wang Reviewed-by: Krzysztof Kozlowski --- .../bindings/pwm/sophgo,sg2042-pwm.yaml | 51 +++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/sophgo,sg2042-pwm.yaml diff --git a/Documentation/devicetree/bindings/pwm/sophgo,sg2042-pwm.yaml b/Documentation/devicetree/bindings/pwm/sophgo,sg2042-pwm.yaml new file mode 100644 index 000000000000..fe89719ed9dd --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/sophgo,sg2042-pwm.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/sophgo,sg2042-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo SG2042 PWM controller + +maintainers: + - Chen Wang + +description: + This controller contains 4 channels which can generate PWM waveforms. + +allOf: + - $ref: pwm.yaml# + +properties: + compatible: + const: sophgo,sg2042-pwm + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: apb + + "#pwm-cells": + const: 2 + +required: + - compatible + - reg + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + pwm@7f006000 { + compatible = "sophgo,sg2042-pwm"; + reg = <0x7f006000 0x1000>; + #pwm-cells = <2>; + clocks = <&clock 67>; + clock-names = "apb"; + };