Message ID | 20210315085608.16010-1-zhangqing@rock-chips.com (mailing list archive) |
---|---|
Headers | show |
Series | clk: rockchip: add clock controller for rk3568 | expand |
On Mon, 15 Mar 2021 16:56:04 +0800, Elaine Zhang wrote: > Add the clock tree definition for the new rk3568 SoC. > > Change in V5: > [PATCH v5 1/4]: No change. > [PATCH v5 2/4]: No change. > [PATCH v5 3/4]: fix up the warning: > >> drivers/clk/rockchip/clk-rk3188.c:187:67: warning: > >> missing braces around initializer [-Wmissing-braces] > 187 | static const struct rockchip_cpuclk_reg_data > rk3188_cpuclk_data = { > [PATCH v5 4/4]: No change. > > [...] Applied, thanks! [1/4] dt-binding: clock: Document rockchip, rk3568-cru bindings commit: 0cd74eec54a3ec34416bab6cc640a88230472078 [2/4] clk: rockchip: add dt-binding header for rk3568 commit: 0865517926660309b796bd9bd5ba6671704733bc [3/4] clk: rockchip: support more core div setting commit: a3561e77cf3ca0937227ba13744d84fc46e5eb4b [4/4] clk: rockchip: add clock controller for rk3568 commit: cf911d89c4c5e225a2a2cfadf1364838154b2202 Best regards,