mbox series

[v8,0/4] Add Naneng combo PHY support for RK3568

Message ID 20220208091326.12495-1-yifeng.zhao@rock-chips.com (mailing list archive)
Headers show
Series Add Naneng combo PHY support for RK3568 | expand

Message

Yifeng Zhao Feb. 8, 2022, 9:13 a.m. UTC
This phy can be used as pcie-phy, usb3-phy, sata-phy or sgmii-phy.

Changes in v8:
- rename 'mode' to 'type'
- using devm_reset_control_array_get_exclusive
- move rockchip_combphy_set_mode into rockchip_combphy_init

Changes in v7:
- remove u3otg0_port_en, u3otg1_port_en and pipe_sgmii_mac_sel
- rename regs

Changes in v5:
- modify description for ssc and ext-refclk
- remove apb reset
- add rockchip_combphy_updatel()
- restyle

Changes in v4:
- restyle
- remove some minItems
- add more properties
- remove reset-names
- move #phy-cells
- add rockchip,rk3568-pipe-grf
- add rockchip,rk3568-pipe-phy-grf
- add devm_reset_control_array_get()
- remove clk structure
- change refclk DT parse
- change dev_err message
- add dot to phrase
- add ext_refclk variable
- add enable_ssc variable
- rename rockchip_combphy_param_write
- remove param_read
- replace rockchip-naneng-combphy driver name
- rename node name

Changes in v3:
- Using api devm_reset_control_get_optional_exclusive and dev_err_probe.
- Remove apb_rst.
- Redefine registers address.
- Move pipe_phy_grf0 to rk3568.dtsi

Changes in v2:
- Fix dtschema/dtc warnings/errors
- Using api devm_platform_get_and_ioremap_resource.
- Modify rockchip_combphy_set_Mode.
- Add some PHY registers definition.
- Move phy0 to rk3568.dtsi

Johan Jonker (1):
  dt-bindings: soc: grf: add naneng combo phy register compatible

Yifeng Zhao (3):
  dt-bindings: phy: rockchip: Add Naneng combo PHY bindings
  phy: rockchip: add naneng combo phy for RK3568
  arm64: dts: rockchip: add naneng combo phy nodes for rk3568

 .../phy/phy-rockchip-naneng-combphy.yaml      | 109 ++++
 .../devicetree/bindings/soc/rockchip/grf.yaml |   2 +
 arch/arm64/boot/dts/rockchip/rk3568.dtsi      |  21 +
 arch/arm64/boot/dts/rockchip/rk356x.dtsi      |  47 ++
 drivers/phy/rockchip/Kconfig                  |   8 +
 drivers/phy/rockchip/Makefile                 |   1 +
 .../rockchip/phy-rockchip-naneng-combphy.c    | 581 ++++++++++++++++++
 7 files changed, 769 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml
 create mode 100644 drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

Comments

Frank Wunderlich Feb. 9, 2022, 4:39 p.m. UTC | #1
Hi

Tested complete series on rk3568 based Bananapi R2 Pro

combphy0: usb3 (usbdrd3_0)
combphy1: usb3 (usbdrd3_1)
combphy2: sata (sata2)

Tested-by: Frank Wunderlich <frank-w@public-files.de>

regards Frank
Vinod Koul Feb. 24, 2022, 2:44 p.m. UTC | #2
On 08-02-22, 17:13, Yifeng Zhao wrote:
> 
> This phy can be used as pcie-phy, usb3-phy, sata-phy or sgmii-phy.

Applied 1-3, thanks
zyf@rock-chips.com Feb. 25, 2022, 7:35 a.m. UTC | #3
Hi Rob,

I can't reproduce this issue unless revert "[v8,1/4] dt-bindings: soc: grf: add naneng combo phy register compatible".

build log:
  DTC     Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.example.dt.yaml
  CHECK   Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.example.dt.yaml

build environment:

yamllint version: yamllint 1.26.3

kernel base:
commit 44948bd49d878dad6c9707e34f4a06df73c3a800 (tag: next-20220224, origin/master, origin/HEAD)

dtschema version:
pip3 install dtschema --upgrade
Defaulting to user installation because normal site-packages is not writeable
Requirement already satisfied: dtschema in /home2/zyf/.local/lib/python3.6/site-packages (2021.10)
Collecting dtschema
  Using cached dtschema-2022.1-py3-none-any.whl (63 kB)
Requirement already satisfied: rfc3987 in /home2/zyf/.local/lib/python3.6/site-packages (from dtschema) (1.3.8)
Requirement already satisfied: ruamel.yaml>0.15.69 in /home2/zyf/.local/lib/python3.6/site-packages (from dtschema) (0.17.16)
  Using cached dtschema-2021.12-py3-none-any.whl (62 kB)
Requirement already satisfied: jsonschema>=3.0.1 in /home2/zyf/.local/lib/python3.6/site-packages (from dtschema) (4.0.0)
Requirement already satisfied: importlib-metadata in /home2/zyf/.local/lib/python3.6/site-packages (from jsonschema>=3.0.1->dtschema) (4.8.3)
Requirement already satisfied: pyrsistent!=0.17.0,!=0.17.1,!=0.17.2,>=0.14.0 in /home2/zyf/.local/lib/python3.6/site-packages (from jsonschema>=3.0.1->dtschema) (0.18.0)
Requirement already satisfied: attrs>=17.4.0 in /home2/zyf/.local/lib/python3.6/site-packages (from jsonschema>=3.0.1->dtschema) (21.4.0)
Requirement already satisfied: ruamel.yaml.clib>=0.1.2 in /home2/zyf/.local/lib/python3.6/site-packages (from ruamel.yaml>0.15.69->dtschema) (0.2.6)
Requirement already satisfied: typing-extensions>=3.6.4 in /home2/zyf/.local/lib/python3.6/site-packages (from importlib-metadata->jsonschema>=3.0.1->dtschema) (4.1.1)
Requirement already satisfied: zipp>=0.5 in /home2/zyf/.local/lib/python3.6/site-packages (from importlib-metadata->jsonschema>=3.0.1->dtschema) (3.6.0)


>From:"Rob Herring  <robh@kernel.org>"
>To:Yifeng Zhao  <yifeng.zhao@rock-chips.com>
>Date:2022-02-09 04:33:32
>Subject:Re: [PATCH v8 2/4] dt-bindings: phy: rockchip: Add Naneng combo PHY bindings
>
>On Tue, 08 Feb 2022 17:13:24 +0800, Yifeng Zhao wrote:
>> Add the compatible strings for the Naneng combo PHY found on rockchip SoC.
>> 
>> Reviewed-by: Rob Herring <robh@kernel.org>
>> Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
>> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
>> ---
>> 
>> Changes in v8: None
>> Changes in v7:
>> - remove u3otg0_port_en, u3otg1_port_en and pipe_sgmii_mac_sel
>> 
>> Changes in v5:
>> - modify description for ssc and ext-refclk
>> - remove apb reset
>> 
>> Changes in v4:
>> - restyle
>> - remove some minItems
>> - add more properties
>> - remove reset-names
>> - move #phy-cells
>> - add rockchip,rk3568-pipe-grf
>> - add rockchip,rk3568-pipe-phy-grf
>> 
>> Changes in v3: None
>> Changes in v2:
>> - Fix dtschema/dtc warnings/errors
>> 
>>  .../phy/phy-rockchip-naneng-combphy.yaml      | 109 ++++++++++++++++++
>>  1 file changed, 109 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml
>> 
>
>My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
>on your patch (DT_CHECKER_FLAGS is new in v5.13):
>
>yamllint warnings/errors:
>
>dtschema/dtc warnings/errors:
>Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.example.dt.yaml:0:0: /example-0/syscon@fdc50000: failed to match any schema with compatible: ['rockchip,rk3568-pipe-grf', 'syscon']
>Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.example.dt.yaml:0:0: /example-0/syscon@fdc70000: failed to match any schema with compatible: ['rockchip,rk3568-pipe-phy-grf', 'syscon']
>
>doc reference errors (make refcheckdocs):
>
>See https://patchwork.ozlabs.org/patch/1589719
>
>This check can fail if there are any dependencies. The base for a patch
>series is generally the most recent rc1.
>
>If you already ran 'make dt_binding_check' and didn't see the above
>error(s), then make sure 'yamllint' is installed and dt-schema is up to
>date:
>
>pip3 install dtschema --upgrade
>
>Please check and re-submit.
Heiko Stübner Feb. 25, 2022, 4:05 p.m. UTC | #4
On Tue, 8 Feb 2022 17:13:22 +0800, Yifeng Zhao wrote:
> This phy can be used as pcie-phy, usb3-phy, sata-phy or sgmii-phy.
> 
> Changes in v8:
> - rename 'mode' to 'type'
> - using devm_reset_control_array_get_exclusive
> - move rockchip_combphy_set_mode into rockchip_combphy_init
> 
> [...]

Applied, thanks!

[4/4] arm64: dts: rockchip: add naneng combo phy nodes for rk3568
      commit: 3cc8cd2d25954ed5794df2d190b81c7325c584e3

Best regards,