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The code additions are rather tiny: It only need some code in the Rockchip dw-mipi-dsi glue layer for this SoC, add support for an additional clock and do some changes in the SoC's clock driver. Support for the phy was already added when the Innosilicon D-PHY driver was initially submitted. I tested it with a 800x1280 DSI panel where all 4 lanes that are supported are used. changes in v2: To improve power-efficiency when the DSI controller is not in use, I dropped the patch which made hclk_vio_h2p a critical clock and instead added support for an AHB clock to the DSI controller driver and updated the bindings and the addition to the SoC DT accordingly. Link to v1: https://lore.kernel.org/linux-kernel/20240506194343.282119-1-knaerzche@gmail.com/ Please see individual patches for details about the changes. Alex Bee (7): dt-bindings: display: rockchip,dw-mipi-dsi: Document RK3128 DSI dt-bindings: clock: rk3128: Add PCLK_MIPIPHY clk: rockchip: rk3128: Export PCLK_MIPIPHY drm/rockchip: dsi: Support optional AHB clock drm/rockchip: dsi: Add support for RK3128 ARM: dts: rockchip: Add D-PHY for RK3128 ARM: dts: rockchip: Add DSI for RK3128 .../rockchip/rockchip,dw-mipi-dsi.yaml | 25 +++++++++- arch/arm/boot/dts/rockchip/rk3128.dtsi | 50 +++++++++++++++++++ drivers/clk/rockchip/clk-rk3128.c | 2 +- .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 45 +++++++++++++++++ include/dt-bindings/clock/rk3128-cru.h | 1 + 5 files changed, 121 insertions(+), 2 deletions(-)